1const _CFG_SYSCODE = { 2 "A1":{"Model":"Apple I" ,"CPU":"6502" ,"Speeds":"1.023" ,"Display":"A1_txt" ,"Slotslogphy":"" ,"ROM":"" ,"KeyFont":"A1_US"} 3,"A2":{"Model":"Apple II" ,"CPU":"6502" ,"Speeds":"1.023" ,"Display":"A2_hgr" ,"Slotslogphy":"[0-7] [0-7]" ,"ROM":"" ,"KeyFont":"A2_US"} 4,"A2P":{"Model":"Apple II Plus" ,"CPU":"6502" ,"Speeds":"1.023" ,"Display":"A2_hgr" ,"Slotslogphy":"[0-7] [0-7]" ,"ROM":"A2P_R" ,"KeyFont":"A2_US"} 5,"A2PE":{"Model":"Apple II EuroPlus" ,"CPU":"6502" ,"Speeds":"1.023" ,"Display":"A2_hgr" ,"Slotslogphy":"[0-7] [0-7]" ,"ROM":"" ,"KeyFont":"A2_US"} 6,"A2JP":{"Model":"Apple II J-Plus" ,"CPU":"6502" ,"Speeds":"1.023" ,"Display":"A2_hgr" ,"Slotslogphy":"[0-7] [0-7]" ,"ROM":"" ,"KeyFont":"A2_JP"} 7,"A2B":{"Model":"Bell & Howell" ,"CPU":"6502" ,"Speeds":"1.023" ,"Display":"A2_hgr" ,"Slotslogphy":"[0-7] [0-7]" ,"ROM":"" ,"KeyFont":"A1_US_blk"} 8,"A3":{"Model":"Apple III" ,"CPU":"6502B" ,"Speeds":"1.8" ,"Display":"A3_dhgr" ,"Slotslogphy":"[0-7] [1-4]" ,"ROM":"" ,"KeyFont":"A3_US"} 9,"A3R":{"Model":"Apple III Revised" ,"CPU":"6502B" ,"Speeds":"1.8" ,"Display":"A2_hgr" ,"Slotslogphy":"[0-7] [1-4]" ,"ROM":"" ,"KeyFont":"A3_US"} 10,"A2e":{"Model":"Apple IIe RevA/B" ,"CPU":"6502" ,"Speeds":"1.023" ,"Display":"A2_hgr" ,"Slotslogphy":"[0-7] [1-7]" ,"ROM":"" ,"KeyFont":"A2e_US, A2e_UK, A2e_CA, A2e_FR"} 11,"A2c":{"Model":"Apple IIc" ,"CPU":"65C02" ,"Speeds":"1.023" ,"Display":"A2_dhgr" ,"Slotslogphy":"[0-7] []" ,"ROM":"" ,"KeyFont":""} 12,"A3P":{"Model":"Apple III Plus" ,"CPU":"6502B" ,"Speeds":"1.8" ,"Display":"A3_dhgr" ,"Slotslogphy":"[0-7] [1-4]" ,"ROM":"" ,"KeyFont":""} 13,"A2eE":{"Model":"Apple IIe Enhanced" ,"CPU":"65C02" ,"Speeds":"1.023" ,"Display":"A2_dhgr" ,"Slotslogphy":"[0-7] [0-7]" ,"ROM":"" ,"KeyFont":""} 14,"A2GS":{"Model":"Apple IIGS" ,"CPU":"65C816" ,"Speeds":"2.8" ,"Display":"AGS" ,"Slotslogphy":"[0-7] [1-7]" ,"ROM":"" ,"KeyFont":""} 15,"A2cM":{"Model":"Apple IIc MemoryExp" ,"CPU":"65C02" ,"Speeds":"1.023" ,"Display":"A2_dhgr" ,"Slotslogphy":"[0-7] []" ,"ROM":"" ,"KeyFont":""} 16,"A2G3":{"Model":"Apple IIGS ROM3" ,"CPU":"65C816" ,"Speeds":"2.8" ,"Display":"AGS" ,"Slotslogphy":"[0-7] [1-7]" ,"ROM":"" ,"KeyFont":""} 17,"A2eP":{"Model":"Apple IIe Platinum" ,"CPU":"65C02" ,"Speeds":"1.023" ,"Display":"A2_dhgr" ,"Slotslogphy":"[0-7] [1-7]" ,"ROM":"" ,"KeyFont":""} 18} 19 20const _CFG_ROMRANGES = { 21 "A2P_R":{"ROM":"$D000-$FFFF" ,"CRC16":"$CF45"} 22} 23 24const _CFG_IORANGES = { 25 "A1":{"HostIO":"$D010-$D013" ,"HostROM":"" ,"SlotIO":"" ,"SlotROM":""} 26,"A2,A2P,A2PE,A2JP,A2B":{"HostIO":"$C000-$C07F" ,"HostROM":"$C800-$CFFF" ,"SlotIO":"$C0<sub>8+n</sub>0-$C0<sub>8+n</sub>F" ,"SlotROM":"$C<sub>n</sub>00-$C<sub>n</sub>FF"} 27,"A2E,A2Ee,A2eP":{"HostIO":"$C000-$C07F" ,"HostROM":"$C800-$CFFF" ,"SlotIO":"$C0<sub>8+n</sub>0-$C0<sub>8+n</sub>F" ,"SlotROM":"$C<sub>n</sub>00-$C<sub>n</sub>FF"} 28,"A2c,A2cM":{"HostIO":"$C000-$C07F" ,"HostROM":"$C800-$CFFF" ,"SlotIO":"$C0<sub>8+n</sub>0-$C0<sub>8+n</sub>F" ,"SlotROM":"$C<sub>n</sub>00-$C<sub>n</sub>FF"} 29,"A3,A3P,A3R":{"HostIO":"$C000-$C07F" ,"HostROM":"" ,"SlotIO":"$C0<sub>8+n</sub>0-$C0<sub>8+n</sub>F" ,"SlotROM":"$C<sub>n</sub>00-$C<sub>n</sub>FF"} 30,"A2G3,A2GS":{"HostIO":"$C000-$C07F" ,"HostROM":"" ,"SlotIO":"$C0<sub>8+n</sub>0-$C0<sub>8+n</sub>F" ,"SlotROM":"$C<sub>n</sub>00-$C<sub>n</sub>FF"} 31} 32 33const _CFG_IOADDR = { 34 "$C000a":{"Name":"KBD" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP<br>,A2c,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RD" ,"Description":"Last Key Pressed + 128"} 35,"$C000b":{"Name":"80STOREOFF" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR" ,"Description":"Use $C002-$C005 for Aux Memory"} 36,"$C000c":{"Name":"KBDBUSA" ,"SYScode":"" ,"Range":"HI" ,"Behaviors":"" ,"Description":"V Keyboard 'A' busdata"} 37,"$C001":{"Name":"80STOREON" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR" ,"Description":"Use PAGE2 for Aux Memory"} 38,"$C002":{"Name":"RDMAINRAM" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR" ,"Description":"If 80STORE Off: Read Main Mem $0200-$BFFF"} 39,"$C003":{"Name":"RDCARDRAM" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR" ,"Description":"If 80STORE Off: Read Aux Mem $0200-$BFFF"} 40,"$C004":{"Name":"WRMAINRAM" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR" ,"Description":"If 80STORE Off: Write Main Mem $0200-$BFFF"} 41,"$C005":{"Name":"WRCARDRAM" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR" ,"Description":"If 80STORE Off: Write Aux Mem $0200-$BFFF"} 42,"$C006":{"Name":"SETSLOTCXROM" ,"SYScode":"A2E,A2Ee,A2eP,A2G3<br>,A2GS" ,"Range":"HI" ,"Behaviors":"WR" ,"Description":"Peripheral ROM ($C100-$CFFF)"} 43,"$C007":{"Name":"SETINTCXROM" ,"SYScode":"A2E,A2Ee,A2eP,A2G3<br>,A2GS" ,"Range":"HI" ,"Behaviors":"WR" ,"Description":"Internal ROM ($C100-$CFFF)"} 44,"$C008a":{"Name":"SETSTDZP" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR" ,"Description":"Main Stack and Zero Page"} 45,"$C008b":{"Name":"KBDBUSB" ,"SYScode":"" ,"Range":"HI" ,"Behaviors":"" ,"Description":"V Keyboard 'B' busdata"} 46,"$C009":{"Name":"SETALTZP" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR" ,"Description":"Aux Stack and Zero Page"}
47,"$C00A":{"Name":"SETINTC3ROM" ,"SYScode":"A2E,A2Ee,A2eP,A2G3<br>,A2GS" ,"Range":"HI" ,"Behaviors":"WR" ,"Description":"ROM in Slot 3"} 48,"$C00B":{"Name":"SETSLOTC3ROM" ,"SYScode":"A2E,A2Ee,A2eP,A2G3<br>,A2GS" ,"Range":"HI" ,"Behaviors":"WR" ,"Description":"ROM in Aux Slot"} 49,"$C00C":{"Name":"CLR80VID" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR" ,"Description":"40 Columns"} 50,"$C00D":{"Name":"SET80VID" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR" ,"Description":"80 Columns"} 51,"$C00E":{"Name":"CLRALTCHAR" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR" ,"Description":"Primary Character Set"} 52,"$C00F":{"Name":"SETALTCHAR" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR" ,"Description":"Alternate Character Set"} 53,"$C010":{"Name":"KBDSTRB" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP<br>,A2c,A2cM,A3,A3P<br>,A3R,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"Keyboard Strobe"} 54,"$C011":{"Name":"RDLCBNK2" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Status of Selected $Dx Bank"} 55,"$C012":{"Name":"RDLCRAM" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Status of $Dx ROM / $Dx RAM"} 56,"$C013":{"Name":"RDRAMRD" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Status of Main/Aux RAM Reading"} 57,"$C014":{"Name":"RDRAMWRT" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Status of Main/Aux RAM Writing"} 58,"$C015a":{"Name":"RDCXROM" ,"SYScode":"A2E,A2Ee,A2eP,A2G3<br>,A2GS" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Status of Periph/ROM Access"} 59,"$C015b":{"Name":"RSTXINT" ,"SYScode":"A2c,A2cM" ,"Range":"HI" ,"Behaviors":"RD" ,"Description":"Reset Mouse X0 Interrupt"} 60,"$C016":{"Name":"RDALTZP" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Status of Main/Aux Stack and Zero Page"} 61,"$C017a":{"Name":"RDC3ROM" ,"SYScode":"A2E,A2Ee,A2eP,A2G3<br>,A2GS" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Status of Slot 3/Aux Slot ROM"} 62,"$C017b":{"Name":"RSTYINT" ,"SYScode":"A2c,A2cM" ,"Range":"HI" ,"Behaviors":"RD" ,"Description":"Reset Mouse Y0 Interrupt"} 63,"$C018":{"Name":"RD80STORE" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Status of $C002-$C005/PAGE2 for Aux Mem"} 64,"$C019a":{"Name":"RDVBL" ,"SYScode":"A2E,A2Ee,A2eP,A2G3<br>,A2GS" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Vertical Blanking (E:1=drawing G:0=drawing)"} 65,"$C019b":{"Name":"RSTVBL" ,"SYScode":"A2c,A2cM" ,"Range":"HI" ,"Behaviors":"RD" ,"Description":"Reset Vertical Blanking Interrupt"} 66,"$C01A":{"Name":"RDTEXT" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Status of Text/Graphics"} 67,"$C01B":{"Name":"RDMIXED" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Status of Full Screen/Mixed Graphics"} 68,"$C01C":{"Name":"RDPAGE2" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Status of Page 1/Page 2"} 69,"$C01D":{"Name":"RDHIRES" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Status of LoRes/HiRes"} 70,"$C01E":{"Name":"RDALTCHAR" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Status of Primary/Alternate Character Set"} 71,"$C01F":{"Name":"RD80VID" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Status of 40/80 Columns"} 72,"$C020":{"Name":"TAPEOUT" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP" ,"Range":"HI" ,"Behaviors":"RD" ,"Description":"Toggle Cassette Tape Output"} 73,"$C021":{"Name":"MONOCOLOR" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR,BI" ,"Description":"Color/Mono"} 74,"$C022":{"Name":"TBCOLOR" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RG" ,"Description":"Screen Color: Low Nibble is BG, High Nibble is Text"} 75,"$C023":{"Name":"VGCINT" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RG" ,"Description":"Video Graphics Controller Interrupts: b0-2=ext,scan,1sec enable b4-7=ext,scan,1sec,VGC"} 76,"$C024":{"Name":"MOUSEDATA" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RG" ,"Description":"Mouse Data: High Bit is Button, Other Bits are Movement"} 77,"$C025":{"Name":"KEYMODREG" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RG" ,"Description":"Modifier Keys: Bit 7: Command, Bit 6: Option, Bit 5: NotUsed, Bit 4: Keypad, Bit 3: Repeat, Bit 2: Caps, Bit 1: Control, Bit 0: Shift"} 78,"$C026":{"Name":"DATAREG" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RG" ,"Description":"ADB Command/Data b0-2=# b3=valid b4=clr buf b5=reboot b6=abort b7=status"} 79,"$C027":{"Name":"KMSTATUS" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RG" ,"Description":"ADB Status: b0=cmdFull b1=mouseX b2=keyIntr b3=key b4=cmdIntr b5=data 6=mouseInt 7=mouse"} 80,"$C028":{"Name":"ROMBANK" ,"SYScode":"" ,"Range":"HI" ,"Behaviors":"" ,"Description":"ROM bank select toggle"} 81,"$C029":{"Name":"NEWVIDEO" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RG" ,"Description":"New Video: 129=SHR, 1=None, Bit 6=Linearize, Bit 5=BW"} 82,"$C02B":{"Name":"LANGSEL" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"" ,"Description":"Bit 3=Secondary Bit 4=50Hz Bits 5-7=Display Language"} 83,"$C02C":{"Name":"CHARROM" ,"SYScode":"" ,"Range":"HI" ,"Behaviors":"" ,"Description":"Addr for test mode read of character ROM"} 84,"$C02D":{"Name":"SLTROMSEL" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"" ,"Description":"Slot Register; Bits 1-7=use slot card"} 85,"$C02E":{"Name":"VERTCNT" ,"SYScode":"" ,"Range":"HI" ,"Behaviors":"" ,"Description":"Addr for read of video cntr bits V5-VB"} 86,"$C02F":{"Name":"HORIZCNT" ,"SYScode":"" ,"Range":"HI" ,"Behaviors":"" ,"Description":"Addr for read of video cntr bits VA-H0"} 87,"$C030":{"Name":"SPKR" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP<br>,A2c,A2cM,A3,A3P<br>,A3R,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RD" ,"Description":"Toggle Speaker"} 88,"$C031":{"Name":"DISKREG" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"" ,"Description":"Disk Interface: Bit 6=3.5 Bit 7=RWHead 1"} 89,"$C032":{"Name":"SCANINT" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RG" ,"Description":"VGC Interrupt-Clear"} 90,"$C033":{"Name":"CLOCKDATA" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"" ,"Description":"Interface to Battery RAM (undocumented)"} 91,"$C034":{"Name":"CLOCKCTL" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"" ,"Description":"b0-3=borderColor b5=stopBit b6=read b7=start"} 92,"$C035":{"Name":"SHADOW" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"" ,"Description":"Inhibit Shadowing: Bit 6: I/O Memory, Bit 5: Alternate, Display Mode, Bit 4: Auxilary HGR, Bit 3: Super HiRes, Bit 2: HiRes, Page 2, Bit 1: HiRes Page 1, Bit 0: Text/LoRes"} 93,"$C036":{"Name":"CYAREG" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"" ,"Description":"Bits 0-3=Disk Detect Bit 4=Shadow All Banks Bit 7=Fast"} 94,"$C037":{"Name":"BMAREG" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"" ,"Description":"Bit 5=BW"} 95,"$C038":{"Name":"SCCBREG" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"" ,"Description":"SCC Command Channel B"} 96,"$C039":{"Name":"SCCAREG" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"" ,"Description":"SCC Command Channel A"} 97,"$C03A":{"Name":"SCCBDATA" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"" ,"Description":"SCC Data Channel B"} 98,"$C03B":{"Name":"SCCADATA" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"" ,"Description":"SCC Data Channel A"} 99,"$C03C":{"Name":"SOUNDCTL" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RG" ,"Description":"Sound Settings: Bits 0-3=Volume Bit 5=AutoIncr Bit 6=RAM Bit 7=Busy"} 100,"$C03D":{"Name":"SOUNDDATA" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"" ,"Description":"Sound Data"} 101,"$C03E":{"Name":"SOUNDADRL" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"" ,"Description":"Address Pointer L"} 102,"$C03F":{"Name":"SOUNDADRH" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"" ,"Description":"Address Pointer H"} 103,"$C040a":{"Name":"STROBE" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP" ,"Range":"HI" ,"Behaviors":"RD" ,"Description":"Game I/O Strobe Output"} 104,"$C040b":{"Name":"RDXYMSK" ,"SYScode":"A2c,A2cM" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Read X0/Y0 Interrupt"} 105,"$C040c":{"Name":"BEEPER" ,"SYScode":"A3,A3P,A3R" ,"Range":"HI" ,"Behaviors":"RD" ,"Description":"Sound hardware beeperC041 RDVBLMSK C R7 Read VBL Interrupt"} 106,"$C042":{"Name":"RDX0EDGE" ,"SYScode":"A2c,A2cM" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Read X0 Edge Selector"} 107,"$C043":{"Name":"RDY0EDGE" ,"SYScode":"A2c,A2cM" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Read Y0 Edge Selector"} 108,"$C044":{"Name":"MMDELTAX" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RG" ,"Description":"Mega II Mouse Delta Movement X"} 109,"$C045":{"Name":"MMDELTAY" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RG" ,"Description":"Mega II Mouse Delta Movement Y"} 110,"$C046a":{"Name":"DIAGTYPE" ,"SYScode":"" ,"Range":"HI" ,"Behaviors":"" ,"Description":"Self or Burn-In diagdistics: Bit 7=burn-in diag"} 111,"$C046b":{"Name":"INTFLAG" ,"SYScode":"" ,"Range":"HI" ,"Behaviors":"" ,"Description":"b0=IRQ b1=MMmov b2=MMbut b3=VBL b4=qsec b5=AN3 b6=mouse was down b7=mouse is down"} 112,"$C047":{"Name":"CLRVBLINT" ,"SYScode":"" ,"Range":"HI" ,"Behaviors":"" ,"Description":"Clear VBL Interrupt"} 113,"$C048a":{"Name":"CLRXYINT" ,"SYScode":"" ,"Range":"HI" ,"Behaviors":"" ,"Description":"Clear MM Interrupt"} 114,"$C048b":{"Name":"RSTXY" ,"SYScode":"A2c,A2cM" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"Reset X and Y Interrupts"} 115,"$C04E":{"Name":"CHRDIS" ,"SYScode":"A3,A3P,A3R" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"Character Ram Disable"} 116,"$C04Fa":{"Name":"EMUBYTE" ,"SYScode":"" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"Emulation ID byte: write once, then read once for program being used, read again for version number. $FE=Bernie, $16=Sweet16, $4B=KEGS, $AB=Appleblossom"} 117,"$C04Fb":{"Name":"CHREN" ,"SYScode":"A3,A3P,A3R" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"Character Ram Enable"} 118,"$C050":{"Name":"TXTCLR" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP<br>,A2c,A2cM,A3,A3P<br>,A3R,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"Display Graphics"} 119,"$C051":{"Name":"TXTSET" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP<br>,A2c,A2cM,A3,A3P<br>,A3R,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"Display Text"} 120,"$C052":{"Name":"MIXCLR" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP<br>,A2c,A2cM,A3,A3P<br>,A3R,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"Display Full Screen"} 121,"$C053":{"Name":"MIXSET" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP<br>,A2c,A2cM,A3,A3P<br>,A3R,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"Display Split Screen"} 122,"$C054":{"Name":"TXTPAGE1" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP<br>,A2c,A2cM,A3,A3P<br>,A3R,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"Display Page 1"} 123,"$C055":{"Name":"TXTPAGE2" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP<br>,A2c,A2cM,A3,A3P<br>,A3R,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"If 80STORE Off: Display Page 2"} 124,"$C056":{"Name":"LORES" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP<br>,A2c,A2cM,A3,A3P<br>,A3R,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"Display LoRes Graphics"} 125,"$C057":{"Name":"HIRES" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP<br>,A2c,A2cM,A3,A3P<br>,A3R,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"Display HiRes Graphics"} 126,"$C058a":{"Name":"CLRAN0" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP<br>,A3,A3P,A3R,A2G3<br>,A2GS" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"If IOUDIS off: Annunciator 0 Off"} 127,"$C058b":{"Name":"DISXY" ,"SYScode":"A2c,A2cM" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"If IOUDIS on: Mask X0/Y0 Move Interrupts"} 128,"$C059a":{"Name":"SETAN0" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP<br>,A3,A3P,A3R,A2G3<br>,A2GS" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"If IOUDIS off: Annunciator 0 On"} 129,"$C059b":{"Name":"ENBXY" ,"SYScode":"A2c,A2cM" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"If IOUDIS on: Allow X0/Y0 Move Interrupts"} 130,"$C05Aa":{"Name":"CLRAN1" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP<br>,A3,A3P,A3R,A2G3<br>,A2GS" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"If IOUDIS off: Annunciator 1 Off"} 131,"$C05Ab":{"Name":"DISVBL" ,"SYScode":"A2c,A2cM" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"If IOUDIS on: Disable VBL Interrupts"} 132,"$C05Ba":{"Name":"SETAN1" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP<br>,A3,A3P,A3R,A2G3<br>,A2GS" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"If IOUDIS off: Annunciator 1 On"} 133,"$C05Bb":{"Name":"ENVBL" ,"SYScode":"A2c,A2cM" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"If IOUDIS on: Enable VBL Interrupts"} 134,"$C05Ca":{"Name":"CLRAN2" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP<br>,A3,A3P,A3R,A2G3<br>,A2GS" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"If IOUDIS off: Annunciator 2 Off"} 135,"$C05Cb":{"Name":"X0EDGE" ,"SYScode":"A2c,A2cM" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"If IOUDIS on: Interrupt on X0 Rising"} 136,"$C05Da":{"Name":"SETAN2" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP<br>,A3,A3P,A3R,A2G3<br>,A2GS" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"If IOUDIS off: Annunciator 2 On"} 137,"$C05Db":{"Name":"X0EDGE" ,"SYScode":"A2c,A2cM" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"If IOUDIS on: Interrupt on X0 Falling"} 138,"$C05Ea":{"Name":"CLRAN3" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP<br>,A3,A3P,A3R,A2G3<br>,A2GS" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"If IOUDIS off: Annunciator 3 Off"} 139,"$C05Eb":{"Name":"Y0EDGE" ,"SYScode":"A2c,A2cM" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"If IOUDIS on: Interrupt on Y0 Rising"} 140,"$C05Ec":{"Name":"DHIRESON" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A3,A3P,A3R<br>,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"In 80-Column Mode: Double Width Graphics"} 141,"$C05Fa":{"Name":"SETAN3" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP<br>,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"If IOUDIS off: Annunciator 3 On"} 142,"$C05Fb":{"Name":"Y0EDGE" ,"SYScode":"A2c,A2cM" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"If IOUDIS on: Interrupt on Y0 Falling"} 143,"$C05Fc":{"Name":"DHIRESOFF" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"In 80-Column Mode: Single Width Graphics"} 144,"$C060a":{"Name":"TAPEIN" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Read Cassette Input"} 145,"$C060b":{"Name":"COL80SW" ,"SYScode":"A2c,A2cM,A3,A3P<br>,A3R" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Status of 80/40 Column Switch"} 146,"$C060c":{"Name":"BUTN3" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Switch In
146put 3"} 147,"$C061":{"Name":"RDBTN0" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Switch Input 0 / Open Apple"} 148,"$C062":{"Name":"BUTN1" ,"SYScode":"A2E,A2Ee,A2eP,A2G3<br>,A2GS" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Switch Input 1 / Solid Apple"} 149,"$C063a":{"Name":"RD63" ,"SYScode":"A2E,A2Ee,A2eP,A2G3<br>,A2GS" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Switch Input 2 / Shift Key"} 150,"$C063b":{"Name":"RDMOUBTN" ,"SYScode":"A2c,A2cM" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Bit 7 = Mouse Button Not Pressed"} 151,"$C064":{"Name":"PADDL0" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP<br>,A2c,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Analog Input 0"} 152,"$C065":{"Name":"PADDL1" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP<br>,A2c,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Analog Input 1"} 153,"$C066a":{"Name":"PADDL2" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP<br>,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Analog Input 2"} 154,"$C066b":{"Name":"RDMOUX1" ,"SYScode":"A2c,A2cM" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Mouse Horiz Position"} 155,"$C067a":{"Name":"PADDL3" ,"SYScode":"A2,A2P,A2PE,A2JP<br>,A2B,A2E,A2Ee,A2eP<br>,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Analog Input 3"} 156,"$C067b":{"Name":"RDMOUY1" ,"SYScode":"A2c,A2cM" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Mouse Vert Position"} 157,"$C068":{"Name":"STATEREG" ,"SYScode":"A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"RG" ,"Description":"b0=INTCXROM b1=ROMBANK b2=LCBNK2 b3=RDROM b4=RAMWRT b5=RAMRD b6=PAGE2 b7=ALTZP"} 158,"$C06D":{"Name":"TESTREG" ,"SYScode":"" ,"Range":"HI" ,"Behaviors":"" ,"Description":"Test Mode Bit Register"} 159,"$C06E":{"Name":"CLRTM" ,"SYScode":"" ,"Range":"HI" ,"Behaviors":"" ,"Description":"Clear Test Mode"} 160,"$C06F":{"Name":"ENTM" ,"SYScode":"" ,"Range":"HI" ,"Behaviors":"" ,"Description":"Enable Test Mode"} 161,"$C070a":{"Name":"PTRIG" ,"SYScode":"A2E,A2Ee,A2eP" ,"Range":"HI" ,"Behaviors":"RD" ,"Description":"Analog Input Reset"} 162,"$C070b":{"Name":"PTRIG" ,"SYScode":"A2c,A2cM" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"Analog Input Reset + Reset VBLINT Flag"} 163,"$C070c":{"Name":"PTRIG" ,"SYScode":"A3,A3P,A3R" ,"Range":"HI" ,"Behaviors":"WR,RD" ,"Description":"Access Real Time Clock"} 164,"$C073":{"Name":"BANKSEL" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM,A2G3,A2GS" ,"Range":"HI" ,"Behaviors":"WR" ,"Description":"Memory Bank Select for > 128K"} 165,"$C077":{"Name":"BLOSSOM" ,"SYScode":"" ,"Range":"HI" ,"Behaviors":"WR" ,"Description":"Appleblossom Special I/O Address $C1=Install clock driver, $CC=Get time in input buffer, $CF=get time in ProDOS global page."} 166,"$C078":{"Name":"BLOSSOM" ,"SYScode":"A2c,A2cM" ,"Range":"HI" ,"Behaviors":"WR" ,"Description":"Disable IOU Access"} 167,"$C079":{"Name":"BLOSSOM" ,"SYScode":"A2c,A2cM" ,"Range":"HI" ,"Behaviors":"WR" ,"Description":"Enable IOU Access"} 168,"$C07Ea":{"Name":"IOUDISON" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM" ,"Range":"HI" ,"Behaviors":"WR" ,"Description":"Disable IOU"} 169,"$C07Eb":{"Name":"RDIOUDIS" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Status of IOU Disabling"} 170,"$C07Fa":{"Name":"IOUDISOFF" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM" ,"Range":"HI" ,"Behaviors":"WR" ,"Description":"Enable IOU"} 171,"$C07Fb":{"Name":"RDDHIRES" ,"SYScode":"A2E,A2Ee,A2eP,A2c<br>,A2cM" ,"Range":"HI" ,"Behaviors":"RD,BI" ,"Description":"Status of Double HiRes"} 172} 173 174const _CFG_PCODE = { 175 "MS16K":{"NAME":"Microsoft 16K Language card" ,"IOrange":"$C08<sub>n</sub>0,$C08<sub>n</sub>F" ,"ROMrange":"" ,"LROMrange":"" ,"SLOTrange":"0" ,"SYScode":"A2,A2P,A2E" ,"Manuals":"[user_manual](https://mirrors.apple2.org.za/ftp.apple.asimov.net/documentation/hardware/storage/memory/Microsoft%20RAMCard%20-%20Manual.pdf)"} 176,"TCLKP":{"NAME":"Thunderclock Plus" ,"IOrange":"$C08<sub>n</sub>0,$C08<sub>n</sub>F" ,"ROMrange":"$C0<sub>n</sub>00,$C0<sub>n</sub>FF" ,"LROMrange":"" ,"SLOTrange":"1*,2,3,4,5,6,7" ,"SYScode":"A2,A2P,A2E" ,"Manual
176s":"[user_manual](https://mirrors.apple2.org.za/ftp.apple.asimov.net/documentation/hardware/clocks/ThunderClock%20Plus.pdf)"} 177,"SSC":{"NAME":"Apple Super Serial Card" ,"IOrange":"$C08<sub>n</sub>0,$C08<sub>n</sub>F" ,"ROMrange":"$C0<sub>n</sub>00,$C0<sub>n</sub>FF" ,"LROMrange":"" ,"SLOTrange":"1,2,3,4,5,6,7" ,"SYScode":"A2,A2P,A2E" ,"Manuals":"[user_manual](https://mirrors.apple2.org.za/ftp.apple.asimov.net/documentation/hardware/io/super_serial_card/Apple%20II%20Super%20Serial%20Card%20User%27s%20Manual.pdf)"} 178,"LIRON":{"NAME":"Apple 3.5 Floppy Disk Drive Interface Card" ,"IOrange":"$C08<sub>n</sub>0,$C08<sub>n</sub>F" ,"ROMrange":"$C0<sub>n</sub>00,$C0<sub>n</sub>FF" ,"LROMrange":"" ,"SLOTrange":"1,2,3,4,5,6,7" ,"SYScode":"A2,A2P,A2E" ,"Manuals":"[user_manual](https://mirrors.apple2.org.za/ftp.apple.asimov.net/documentation/hardware/storage/disks/Apple%20II%203.5%20Disk%20Controller%20Card%20Owner%27s%20Guide.pdf)"} 179,"DISKII":{"NAME":"Apple Disk II Floppy Disk Subsystem" ,"IOrange":"$C08<sub>n</sub>0,$C08<sub>n</sub>F" ,"ROMrange":"$C0<sub>n</sub>00,$C0<sub>n</sub>FF" ,"LROMrange":"" ,"SLOTrange":"1,2,3,4,5,6,7" ,"SYScode":"A2,A2P,A2E" ,"Manuals":"[user_manual](https://mirrors.apple2.org.za/Apple%20II%20Documentation%20Project/Peripherals/Disk%20Drives/Apple%20Disk%20II/Manuals/Apple%20Disk%20II%20Floppy%20Disk%20Subsystem%20-%20Installation%20and%20Operating%20Manual.pdf),[technical_manual](https://www.bigmessowires.com/2021/11/12/the-amazing-disk-ii-controller-card/) [deepdive](https://archive.org/details/Beneath_Apple_DOS_alt/page/n15/mode/2up?view=theater)"} 180,"VIDEX":{"NAME":"Videx Videoterm 80 Column Display" ,"IOrange":"$C08<sub>n</sub>0,$C08<sub>n</sub>F" ,"ROMrange":"$C0<sub>n</sub>00,$C0<sub>n</sub>FF" ,"LROMrange":"$C800,$CFFF" ,"SLOTrange":"1,2,3,4,5,6,7" ,"SYScode":"A2,A2P,A2E" ,"Manuals":"[user_manual](https://mirrors.apple2.org.za/Apple%20II%20Documentation%20Project/Interface%20Cards/80%20Column%20Cards/Videx%20Videoterm/Manuals/)"} 181} 182 183const _CFG_SLOT = { 184 0:{"PCODE":"MS16K","IOrange":["$C08<sub>n</sub>0","$C08<sub>n</sub>F"],"ROMrange":[""],"LROMrange":[""] ,"DESCRIPTION":"[16K language card](https://github.com/RetroAppleJS/RetroAppleJS.github.io/blob/main/docs/PERIPHERALS.md#the-16k-language-cards)"} 185,1:{"PCODE":"TCLKP","IOrange":["$C08<sub>n</sub>0","$C08<sub>n</sub>F"],"ROMrange":["$C0<sub>n</sub>00","$C0<sub>n</sub>FF"],"LROMrange":[""] ,"DESCRIPTION":""} 186,2:{"PCODE":"SPC" ,"DESCRIPTION":""} 187,3:{"PCODE":"VIDEX","IOrange":["$C08<sub>n</sub>0","$C08<sub>n</sub>F"],"ROMrange":["$C0<sub>n</sub>00","$C0<sub>n</sub>FF"],"LROMrange":["$C800","$CFFF"] ,"DESCRIPTION":""} 188,4:{"PCODE":"" ,"DESCRIPTION":""} 189,5:{"PCODE":"LIRON","IOrange":["$C08<sub>n</sub>0","$C08<sub>n</sub>F"],"ROMrange":["$C0<sub>n</sub>00","$C0<sub>n</sub>FF"],"LROMrange":[""] ,"DESCRIPTION":""} 190,6:{"PCODE":"DISKII","IOrange":["$C08<sub>n</sub>0","$C08<sub>n</sub>F"],"ROMrange":["$C0<sub>n</sub>00","$C0<sub>n</sub>FF"],"LROMrange":[""] ,"DESCRIPTION":""} 191,7:{"PCODE":"" ,"DESCRIPTION":""} 192} 193 194const _CFG_PSLOT = { 195 "A2BO":{"NAME":"Motherboard peripheral" ,"HostIO":"X" ,"SlotIO":"" ,"SlotROM":"" ,"HostROM":"" ,"SLOTrange":"H*" ,"SYScode":"A2,A2P,A2E" ,"Manuals":""} 196,"MS16K":{"NAME":"Microsoft 16K Language card" ,"HostIO":"" ,"SlotIO":"X" ,"SlotROM":"" ,"HostROM":"" ,"SLOTrange":"0*" ,"SYScode":"A2,A2P,A2E" ,"Manuals":"[user_manual](https://mirrors.apple2.org.za/ftp.apple.asimov.net/documentation/hardware/storage/memory/Microsoft%20RAMCard%20-%20Manual.pdf)"} 197,"TCLKP":{"NAME":"Thunderclock Plus" ,"HostIO":"" ,"SlotIO":"X" ,"SlotROM":"X" ,"HostROM":"X" ,"SLOTrange":"1,2,3,4*,5,6,7" ,"SYScode":"A2,A2P,A2E" ,"Manuals":"[user_manual](https://mirrors.apple2.org.za/ftp.apple.asimov.net/documentation/hardware/clocks/ThunderClock%20Plus.pdf)"} 198,"AMOUSE":{"NAME":"AppleMouse II Interface" ,"HostIO":"" ,"SlotIO":"X" ,"SlotROM":"X" ,"HostROM":"" ,"SLOTrange":"1,2,3,4,5,6,7" ,"SYScode":"A2,A2P,A2E" ,"Manuals":"[user_manual](https://github.com/freitz85/AppleIIMouse/blob/master/AppleMouse%20II%20User's%20Manual.pdf)"} 199,"LIRON":{"NAME":"Apple 3.5 Floppy Disk Drive Interface Card" ,"HostIO":"" ,"SlotIO":"X" ,"SlotROM":"X" ,"HostROM":"X" ,"SLOTrange":"1,2,3,4,5*,6,7" ,"SYScode":"A2,A2P,A2E" ,"Manual
199s":"[user_manual](https://mirrors.apple2.org.za/ftp.apple.asimov.net/documentation/hardware/storage/disks/Apple%20II%203.5%20Disk%20Controller%20Card%20Owner%27s%20Guide.pdf)"} 200,"DISKII":{"NAME":"Apple Disk II Floppy Disk Subsystem" ,"HostIO":"" ,"SlotIO":"X" ,"SlotROM":"X" ,"HostROM":"" ,"SLOTrange":"1,2,3,4,5,6*,7" ,"SYScode":"A2,A2P,A2E" ,"Manuals":"[user_manual](https://mirrors.apple2.org.za/Apple%20II%20Documentation%20Project/Peripherals/Disk%20Drives/Apple%20Disk%20II/Manuals/Apple%20Disk%20II%20Floppy%20Disk%20Subsystem%20-%20Installation%20and%20Operating%20Manual.pdf),[technical_manual](https://www.bigmessowires.com/2021/11/12/the-amazing-disk-ii-controller-card/) [deepdive](https://archive.org/details/Beneath_Apple_DOS_alt/page/n15/mode/2up?view=theater)"} 201,"VIDEX":{"NAME":"Videx Videoterm 80 Column Display" ,"HostIO":"" ,"SlotIO":"X" ,"SlotROM":"X" ,"HostROM":"X" ,"SLOTrange":"*3" ,"SYScode":"A2,A2P,A2E" ,"Manuals":"[user_manual](https://mirrors.apple2.org.za/Apple%20II%20Documentation%20Project/Interface%20Cards/80%20Column%20Cards/Videx%20Videoterm/Manuals/)"} 202,"MOCK":{"NAME":"Mockingboard C" ,"HostIO":"" ,"SlotIO":"X" ,"SlotROM":"" ,"HostROM":"" ,"SLOTrange":"1,2,3,4,5,6,7" ,"SYScode":"A2,A2P,A2E" ,"Manuals":"[user_manual](https://mirrors.apple2.org.za/Apple%20II%20Documentation%20Project/Interface%20Cards/80%20Column%20Cards/Videx%20Videoterm/Manuals/)"} 203,"SSC":{"NAME":"Apple Super Serial Card" ,"HostIO":"" ,"SlotIO":"X" ,"SlotROM":"X" ,"HostROM":"" ,"SLOTrange":"1,2,3,4,5,6,7" ,"SYScode":"A2,A2P,A2E" ,"Manuals":"[user_manual](https://mirrors.apple2.org.za/ftp.apple.asimov.net/documentation/hardware/io/super_serial_card/Apple%20II%20Super%20Serial%20Card%20User%27s%20Manual.pdf)"} 204,"SPC":{"NAME":"Apple Serial Pro Card" ,"HostIO":"" ,"SlotIO":"X" ,"SlotROM":"X" ,"HostROM":"X" ,"SLOTrange":"1,2*,3,4,5,6,7" ,"SYScode":"A2,A2P,A2E" ,"Manuals":"[user_manual](https://mirrors.apple2.org.za/Apple%20II%20Documentation%20Project/Interface%20Cards/Serial/AE%20Serial%20Pro/Manuals/AE%20Serial%20Pro%20-%20Manual.pdf)"} 205,"DITHER":{"NAME":"Dithertizer II Card" ,"HostIO":"" ,"SlotIO":"X" ,"SlotROM":"X" ,"HostROM":"" ,"SLOTrange":"1,2,3,4,5,6,*7" ,"SYScode":"A2,A2P,A2E" ,"Manuals":"[user_manual](https://mirrors.apple2.org.za/Apple%20II%20Documentation%20Project/Interface%20Cards/Serial/AE%20Serial%20Pro/Manuals/AE%20Serial%20Pro%20-%20Manual.pdf)"} 206,"DITHER2":{"NAME":"Dithertizer II Card" ,"HostIO":"" ,"SlotIO":"X" ,"SlotROM":"X" ,"HostROM":"" ,"SLOTrange":"1,2,3,4,5,6,7" ,"SYScode":"A2,A2P,A2E" ,"Manuals":"[user_manual](https://mirrors.apple2.org.za/Apple%20II%20Documentation%20Project/Interface%20Cards/Serial/AE%20Serial%20Pro/Manuals/AE%20Serial%20Pro%20-%20Manual.pdf)"} 207} 208 209const _CFG_KEYFONT = { 210 "A2_US":{"MAP_FORMULA":"ch" ,"MAP_JSON":"0x80" ,"":"{'é': [0x45],'â': [0x22],'â': [0x22],'â¦': [0x2E, 0x2E, 0x2E]}"} 211} 212 213const _CFG_CHROMA = { 214 0:{"COL_num":"" ,"COL_name":"FULL-COLOR"} 215,1:{"COL_num":"#FFFFFF" ,"COL_name":"B&W"} 216,2:{"COL_num":"#A0FFF0" ,"COL_name":"GREEN"} 217,3:{"COL_num":"#FCE7A1" ,"COL_name":"AMBER"} 218} 219 220var _TABS = { 221"tab1":{"title":"Emulator","DEF_SYS":"A2P"} 222,"tab2":{"title":"Assembler","DEF_SYS":"A2P"} 223,"tab3":{"title":"Debugger","DEF_SYS":"A2P"} 224,"tab4":{"title":"Manual","DEF_SYS":"A2P"} 225} 226 227const _CFG_TFUNCTION = { 228 ".eq":{"COMPILER":"SourceGen" ,"REGXEP_INPUT":"(^[^;]*)(\\.eq |\\.EQ )(.+)" ,"REGEXP_OUTPUT":"'$1EQU$3'" ,"DESCRIPTION":"Replace .eq by EQU until ;"} 229,".var":{"COMPILER":"SourceGen" ,"REGXEP_INPUT":"(^[^;]*)(\\.var |\\.VAR )(.+)" ,"REGEXP_OUTPUT":"'$1EQU$3'" ,"DESCRIPTION":"Replace .var by EQU until ;"} 230,".org":{"COMPILER":"SourceGen" ,"REGXEP_INPUT":"(^[^;]*)(\\.org |\\.ORG )(.+)" ,"REGEXP_OUTPUT":"'$1ORG$3'" ,"DESCRIPTION":"Replace .org by ORG until ;"} 231,".str":{"COMPILER":"SourceGen" ,"REGXEP_INPUT":"(^[^;]*)(\\.str |\\.STR )(.+)" ,"REGEXP_OUTPUT":"'$1ASC$3'" ,"DESCRIPTION":"Replace .str by ASC until ;"} 232,".bulk":{"COMPILER":"SourceGen" ,"REGXEP_INPUT":"\\x20.bulk\\x20([\\s\\S]*)$" ,"REGEXP_OUTPUT":"'HEX '+x.split('.bulk')[1].replace(/[,$]/g,' ').replace(/\\s\\s+/g,' ').toUpperCase()" ,"DESCRIPTION":"Replace .bulk by HEX, remove strings and commas"} 233,"+":{"COMPILER":"SourceGen" ,"REGXEP_INPUT":"\\x20\\+\\x20([\\s\\S]*)$" ,"REGEXP_OUTPUT":"'HEX '+x.split(' + ')[1].replace(/[,$]/g,' ').replace(/\\s\\s+/g,' ').toUpperCase()" ,"DESCRIPTION":"Replace + by HEX, remove strings and commas"} 234,".fill":{"COMPILER":"SourceGen" ,"REGXEP_INPUT":".fill\\x20([\\s\\S]*)$" ,"REGEXP_OUTPUT":"'HEX'+(' '+x.split(',')[1].replace(/[ \\n\\$]/g,'')).toUpperCase().repeat(x.split(',')[0].replace(/[^0-9]/g,''))+' '" ,"DESCRIPTION":"Substitute .fill by HEX array"} 235,"remove {..}":{"COMPILER":"SourceGen" ,"REGXEP_INPUT":"\\{[^{}]*\\}" ,"REGEXP_OUTPUT":"''" ,"DESCRIPTION":"Remove everything between accolades"} 236,"*":{"COMPILER":"SourceGen" ,"REGXEP_INPUT":"^\\*" ,"REGEXP_OUTPUT":"';*'" ,"DESCRIPTION":"Add semicolumn before any line starting with asterisk"} 237,"upper_before;":{"COMPILER":"SourceGen" ,"REGXEP_INPUT":"^[^;^n]*" ,"REGEXP_OUTPUT":"x.toUpperCase()" ,"DESCRIPTION":"Uppercase everything until bumping into a semicolumn"} 238} 239 240var _DOCS = new Array(); 241_DOCS["ZEROPAGE_APPLE2PLUS"] = "<p>$00-$05 - ??? <br>" 242+" $06-$09 - Free Space <br>" 243+" $0A-$0C - JMP to USR() User Function Routine <br>"
244+" $0D-$17 - ??? <br>" 245+" $18 - First Data Track <br>" 246+" $19 - First Data Sector <br>" 247+" $1A-$1B - Shape Pointer for DRAW <br>" 248+" $1C - Last COLOR Used <br>" 249+" $1D-$1E - Free Space <br>" 250+" $1F - ??? <br>" 251+" $20 - Left Margin (0 - 39/79, 0 is default) <br>" 252+" $21 - Width (1 - 40/80, 40 is default, 0 crashes Applesoft) <br>" 253+" $22 - Top Margin (0 - 23, 0 is default, 20 in graphics mode) <br>" 254+" $23 - Bottom Margin (0 - 23, 23 is default) <br>" 255+" $24 - Horizontal Cursor Position (0 - 39/79) <br>" 256+" $25 - Vertical Cursor Position (0 - 23) <br>" 257+" $26-$27 - Address of Byte Containing X,Y <br>" 258+" $28-$29 - Base Address of Text Cursor's Position <br>" 259+" $2A - ??? <br>" 260+" $2B - Boot Slot * 16 <br>" 261+" $2C - Lo-Res HLIN/VLIN Endpoint <br>" 262+" $2D-$2F - ??? <br>" 263+" $30 - COLOR Value * 17 <br>" 264+" $31 - ??? <br>" 265+" $32 - Text Mask ($FF = Normal, $7F = Inverse, $3F = Flashing) <br>" 266+" $33 - Prompt Character <br>" 267+" $34-$35 - ??? <br>" 268+" $36-$37 - Address of Output Routine <br>" 269+" $38-$39 - Address of Input Routine <br>" 270+" $3A-$4F - ??? <br>" 271+" $50-$51 - Result of the Conversion of the FAC to a 16-Bit Integer <br>" 272+" $52-$66 - ??? <br>" 273+" $67-$68 - Address of Beginning of BASIC Program ($0801 is default) <br>" 274+" $69-$6A - Address of Beginning of BASIC Variables <br>" 275+" $6B-$6C - Address of Beginning of BASIC Arrays <br>" 276+" $6D-$6E - Address of End of BASIC Variables <br>" 277+" $6F-$70 - Address of End of String Data <br>" 278+" $71-$72 - Address to Move String To <br>" 279+" $73-$74 - Address of Beginning of String Data <br>" 280+" $75-$76 - Current Line Number Being Executed <br>" 281+" $77-$78 - Line Number Where END or STOP or BREAK Occurred <br>" 282+" $79-$7A - Address of Line Number Being Executed <br>" 283+" $7B-$7C - Current Address of DATA <br>" 284+" $7D-$7E - Next Address of DATA <br>" 285+" $7F-$80 - Address of Input or Data <br>" 286+" $81-$82 - Last Used Variable's Name <br>" 287+" $83-$84 - Last Used Variable's Address <br>" 288+" $85-$9A - ??? <br>" 289+" $9B-$9C - Pointer for $D61A and $F7D9 <br>" 290+" $9D-$A3 - Floating Point Accumulator (FAC) <br>" 291+" $A4 - ??? <br>" 292+" $A5-$AB - Floating Point Argument Register (ARG) <br>" 293+" $AC-$AE - ??? <br>" 294+" $AF-$B0 - Address of End of BASIC Program <br>" 295+" $B1-$B6 - Subroutine to Increase the String Data Pointer <br>" 296+" $B7-$BE - Subroutine to Return the Character Pointed to by the String Data Pointer <br>" 297+" $BF-$CD - ??? <br>" 298+" $CE-$CF - Free Space <br>" 299+" $D0-$D3 - ??? <br>" 300+" $D4 - Error Code Flag <br>" 301+" $D5-$D6 - ??? <br>" 302+" $D7 - Free Space <br>" 303+" $D8 - Error Flag (Bit 7 Set if an Error Handler is Used) <br>" 304+" $D9 - ??? <br>" 305+" $DA-$DB - Line Number Where Error Occurred <br>" 306+" $DC-$DD - ??? <br>" 307+" $DE - Error Code <br>" 308+" $DF - ??? <br>" 309+" $E0-$E1 - Horizontal Coordinate of HPLOT <br>" 310+" $E2 - Vertical Coordinate of HPLOT <br>" 311+" $E3 - Free Space <br>" 312+" $E4 - HCOLOR Value (0=0, 1=42, 2=85, 3=127, 4=128, 5=170, 6=213, 7=255) <br>" 313+" $E5 - ??? <br>" 314+" $E6 - High Byte of Address of First Byte of Where HGR is Plotted <br>" 315+" $E7 - SCALE Value (0 = 256) <br>" 316+" $E8-$E9 - Address of Shape Table <br>" 317+" $EA - DRAW/XDRAW Collision Count <br>" 318+" $EB-$EF - Free Space <br>" 319+" $F0 - ??? <br>" 320+" $F1 - SPEED Value (Subtracted From 256) <br>" 321+" $F2 - ??? <br>" 322+" $F3 - Text OR Mask for Flashing Text <br>" 323+" $F4-$F5 - Address of Error Handler (Line Number after ONERR GOTO) <br>" 324+" $F6-$F8 - ??? <br>" 325+" $F9 - ROT Value <br>" 326+" $FA-$FE - Free Space <br>" 327+" $FF - Used by Applesoft's STR$ Function </p>" 328 329_DOCS["TOOLS"] = "<h2 id=\"tools-explained\">TOOLS Explained</h2><hr>" 330+"<p>In the <a href=\"../tools\">tools folder</a>, we keep a collection of helpers to simulate, better understand or automate processes supporting the development of the IDE. Every tool is designed to run in the browser, just like the IDE, using HTML/CSS/JavaScript. Discover here the entire <a href=\"https://retroapplejs.github.io/tools/TOOLS_CATALOG.html\">TOOLS CATALOG</a>.</p>" 331+"<h3 id=\"configfile_updaterhtml\">ConfigFile_updater.html</h3>" 332+"<p>Check documentation here : <a href=\"CONFIG.md\">CONFIG.md</a></p>" 333+"<h3 id=\"monitor_palettehtml\">Monitor_palette.html</h3>" 334+"<p><img src=\"https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/palette.png\" width=30% align=left />Color graphics on the Apple II rendered only 4 distinct colors in high-resolution (green, orange, violet, blue) as a result of a cheap but smart piece of discrete logic. Surely, owners of monochrome green or amber monitors sometimes longed for some color, but the blurry and color-bleeding TV screen rendering was more like a gimmick compared to the razor-sharp image produced by a genuine monochrome apple monitor.</p>" 335+"<p>The emulator's display offers an easy switching capability to render color, black&white, green and amber as some graphics really look nicer in color or monochrome. e.g. fonts rendered on a hires screen produce very disturbing color fringing artifacts, which make the letters unreadable in color mode; any monochrome setting is more appropriate in this case. </p>" 336+"<p>This tool was made to test and assure the best image rendering approximation with these respective monitors.<br>" 337+"It produces a Javascript snippet that seamlessly maps the Apple II colors to the different monochrome versions. This snippet is located in <a href=\"..fhttps://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/EMU_DEVICE_video_canvas.js\">EMU_DEVICE_video_canvas.js</a>.</p>" 338+"<h3 id=\"hgrpatternjshtml\">
338HGRpatternJS.html</h3>" 339+"<p><img src=\"https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/HGRpatternJS.png\" align=left width=40% style=\"padding:10px 10px 10px 10px\"/><a href=\"https://retroapplejs.github.io/tools/HGRpatternJS.html\">This tool</a> is designed to find a color encoding strategy to tackle the typical challenges with Apple II HGR graphics. </p>" 340+"<p>Major challenges to picture quality are:</p>" 341+"<ul>" 342+"<li>extreme color limitations (4 true colors + black and white)</li>" 343+"<li>a high-bit color switch ruling over an entire byte</li>" 344+"<li>convolutional color encoding</li>" 345+"<li>low pixel resolution (at today's standards)</li>" 346+"</ul>" 347+"<p>Classic dithering algorithms as we know, simply can't cope well with all the weird stuff that happens on pixel level in an Apple II. Trying dissociate a <strong>color-encoding layer</strong> and a <strong>pattern encoding layer</strong> is challenging, both are seriously messed-up. Most dithering patterns become colors, and generic color dithering algorithms can't handle anamorphous color pallettes. While black-and-White dithering can be achieved by means of a simple trick, <strong>any color dithering algorithm known so far, regular or error-diffusion-based, need to be re-invented</strong>.</p>" 348+"<p>Please check this <a href=\"https://retroapplejs.github.io/tools/HGRpatternJS.html\">small app</a>, especially designed to examine achievable colors for regular dithering by generating any imaginable bit pattern. Small patches or blocks of pixels, will reveal interesting features in both layers. Since the color encoding layer has a size of 2x1 bits (wxh), in a full resolution of 280x192, e.g. rendering 4 colors + black and white brings us already down to a color resolution of only 140x192.</p>" 349+"<p>Block size 2x2 bits<br>" 350+"<img src=\"https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/pattern_block_2x2.png\" width=20% align=left /></p>" 351+"<p>Block size 4x2 bits<br>" 352+"<img src=\"https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/pattern_block_4x2.png\" width=20% align=left /></p>" 353+"<p>The pattern encoding layer can only bare multiples of the color encoding block size, bringing us to a minimal size of 2x2 bits (wxh), and the next being 4x2 bits (wxh). In the next figure, we identify color encoding conflicts.</p>" 354+"<p>Color conflics at block size 2x2 bits<br>" 355+"<img src=\"https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/pattern_block_conflicts_2x2.png\" width=20% align=left /></p>" 356+"<p>Color conflics at block size 4x2 bits<br>" 357+"<img src=\"https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/pattern_block_conflicts_4x2.png\" width=20% align=left /></p>" 358+"<p>Note the high-bit on the right side, turned on or off generates different color conflicts. According to classic dithering practice, these conflicts should be resolved by any means to keep a minimal color deviation.</p>" 359+"<p>The amount of combinations one can get is quite decent, but this testing tool proves that some bit pattern combinations render exactly the same average color. In theory, these repetitions could be removed, but we have to check other aspects before doing so. In practice, we have to deal with color encoding conflics that can occur on byte-level. We still have 7 visible bits per byte ammended by one inivisible high-bit. Situations where a high-bit selector should be =1 in the lower nibble and =0 for the higher nibble, these can be resolved by picking an alternate dithering pattern in the lower nibble or the higher nibble to resolve the conflict. We can additionally reduce the statistical chance for such conflicts by chosing for the larger block size.</p>" 360+"<p>In our conclusion, we are putting together color resolution, color conflict sensitivity and color range :</p>" 361+"<ul>" 362+"<li>color block size 2x1 bits (wxh)<ul>" 363+"<li>color resolution = 140x96</li>" 364+"<li>no color conflics - by ruling out conflictual pattern blocks</li>" 365+"<li>bit combinations = 2 ^ (2 visible bits + 1 high bit) = 8</li>" 366+"<li>net usable color range - 4 distinct colors + black and white</li></ul></li>" 367+"<li>pattern block size 2x2 bits (wxh)<ul>" 368+"<li>color resolution = 140x96</li>" 369+"<li>3 possible high-bit color conflicts between pattern blocks in the same byte</li>" 370+"<li>statistical chance for color conflics = (5/7-2/7)/2 = 0.714 - 0.286 / 2 = 21 %</li>" 371+"<li>
371bit combinations = 2 ^ (4 visible bits + 2 high bits) = 64</li>" 372+"<li>net usable color range - 19 distinct colors + black and white</li></ul></li>" 373+"<li>pattern block size 4x2 bits (wxh)<ul>" 374+"<li>color resolution = 70x96</li>" 375+"<li>1 possible high-bit color conflict between pattern blocks in the same byte</li>" 376+"<li>statistical chance for color conflics = (3/7-4/7)/2 = 0.429 - 0.571 / 2 = 14 %</li>" 377+"<li>bit combinations = 2 ^ (8 visible bits + 2 high biths) = 1024</li>" 378+"<li>net usable color range - ? distinct colors + black and white</li></ul></li>" 379+"<li>mixed mode block size 2x2 and 4x4 bits (wxh)<ul>" 380+"<li>average color resolution = 105x95</li>" 381+"<li>3 possible high-bit color conflicts between pattern blocks in the same byte</li>" 382+"<li>statistical change for color conflicts = (21%+14%)/2 = 17.5%</li>" 383+"<li>bit combinations = 2 ^ (8 vsible bits + 2 high bits) = 1024</li>" 384+"<li>net usable color range - ? distinct colors + black and white</li></ul></li>" 385+"</ul>" 386+"<h4 id=\"pattern-selector\">Pattern selector</h4>" 387+"<p>Patterns are generated by two formulas, the first reporting true (bit=1) or false (bit=0) on the visible bits 0-7 and another formula reporting 0 or 127 for the invisible bit 7. The pattern selector has a double function: selected patterns can be edited and loaded into the first bitmap grid (left pane) and by means of the Generate_HGR button also visualised in the first location of the pattern grid (right pane).</p>" 388+"<table>" 389+"<thead>" 390+"<tr>" 391+"<th id=\"bit7\" style=\"text-align:center;\">bit7</th>" 392+"<th id=\"bit6\" style=\"text-align:center;\">bit6</th>" 393+"<th id=\"bit5\" style=\"text-align:center;\">bit5</th>" 394+"<th id=\"bit4\" style=\"text-align:center;\">bit4</th>" 395+"<th id=\"bit3\" style=\"text-align:center;\">bit3</th>" 396+"<th id=\"bit2\" style=\"text-align:center;\">bit2</th>" 397+"<th id=\"bit1\" style=\"text-align:center;\">bit1</th>" 398+"<th id=\"bit0\" style=\"text-align:right;\">bit0</th>" 399+"</tr>" 400+"</thead>" 401+"<tbody>" 402+"<tr>" 403+"<td style=\"text-align:center;\">high bit</td>" 404+"<td style=\"text-align:center;\">even</td>" 405+"<td style=\"text-align:center;\">odd</td>" 406+"<td style=\"text-align:center;\">even</td>" 407+"<td style=\"text-align:center;\">odd</td>" 408+"<td style=\"text-align:center;\">even</td>" 409+"<td style=\"text-align:center;\">odd</td>" 410+"<td style=\"text-align:right;\">even</td>" 411+"</tr>" 412+"</tbody>" 413+"</table>" 414+"<h4 id=\"color-gamut\">Color gamut</h4>" 415+"<ul>" 416+"<li>switch: 0 selects a pallette of green and violet, and 1 selects a pallet of orange and blue for all 7 visible pixels in bits 0-6</li>" 417+"<li>convolutional logic</li>" 418+"</ul>" 419+"<table>" 420+"<thead>" 421+"<tr>" 422+"<th id=\"<<left\" style=\"text-align:center;\"><<left</th>" 423+"<th id=\"even_bit\" style=\"text-align:center;\">even bit</th>" 424+"<th id=\"right>>\" style=\"text-align:center;\">right>></th>" 425+"<th id=\"\" style=\"text-align:center;\"></th>" 426+"<th id=\"<<left\" style=\"text-align:center;\"><<left</th>" 427+"<th id=\"odd_bit\" style=\"text-align:center;\">odd bit</th>" 428+"<th id=\"right>>\" style=\"text-align:center;\">right>></th>" 429+"</tr>" 430+"</thead>" 431+"<tbody>" 432+"<tr>" 433+"<td style=\"text-align:center;\">1</td>" 434+"<td style=\"text-align:center;\">0</td>" 435+"<td style=\"text-align:center;\">1</td>" 436+"<td style=\"text-align:center;\"></td>" 437+"<td style=\"text-align:center;\">1</td>" 438+"<td style=\"text-align:center;\">0</td>" 439+"<td style=\"text-align:center;\">1</td>" 440+"</tr>" 441+"<tr>" 442+"<td style=\"text-align:center;\"></td>" 443+"<td style=\"text-align:center;\">0</td>" 444+"<td style=\"text-align:center;\"></td>" 445+"<td style=\"text-align:center;\"></td>" 446+"<td style=\"text-align:center;\">1</td>" 447+"<td style=\"text-align:center;\">0</td>" 448+"<td style=\"text-align:center;\">1</td>" 449+"</tr>" 450+"</tbody>" 451+"</table>" 452+"<h3 id=\"converhgrhtml\">ConverHGR.html</h3>" 453+"<p><img src=\"https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/HGR_Venus.png\" align=left width=30% />This handy tool converts the most common image file types to an Apple II HGR color bitmaps. Dithering achieves a way to convert images from high color-depths to lower depths, but Ap
453ple II graphics require a special twist to gracefully overcome inherent 'Wozniackian' artifacts explained in <em>PatternHGR.html</em>. Buttons and tuning sliders will help you model the most acceptable conversion. For developers, the challenge will be to optimize conversion quality and speed, as this very algorithm will serve inside the webcam capture tool.</p>" 454+"<p>TODO: this is only a preliminary version, most features associated with color encoding remain to be implemented. We are waiting for the completion of the HGRpatternJS.html tool for the most optimal dithering algorithm.<br>" 455+"<br><br></p>" 456+"<h3 id=\"camera_capturehtml\">Camera_capture.html</h3>" 457+"<p><img src='https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/camera.png' align=left width=20% />" 458+"The camera capture tool enables your default laptops camera, and transform that into an Apple II graphics bitmap. The image trasformation can be optimised or tweaked by means of several parameters like dithering options, color corrections, brightness and contast. The bitmap can be exported as a hex number stream that can be pasted directly into the assembler prompt which, puts all image data right at it's graphics mapped I/O locations.<br>" 459+"<br><br></p>" 460+"<h3 id=\"diskjshtml\">DiskJS.html</h3>" 461+"<p><img src=\"https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/apple-disk-ii_256.png\" align=left width=30% />The emulator natively works with <strong>.nib formatted disk images</strong>. Therefore, it can read .nib files from your local hard drive to the emulator's memory and download .nib files raw from memory. The emulator also accepts loading .dsk image files, but it always does that by converting from .dsk format to .nib before storing the image in memory.<br>" 462+"This tool does the same thing, plus some extra functions like making a full hex dump and displaying a (16x35) heat map laying out 16 columns (sectors) and 35 rows (tracks).</p>" 463+"<p>A \"GCR table\" button shows an essential feature of the NIB data arrangement: an encoding method for magnetic media. While the DSK file format is a sequence of all the logical byte information on a disk, arranged per track and sector, the NIB format reflects the digital signal picked up from the magnetic track on the disk, which contains a few extras besides pure data. During the design of the Apple II disk drive and interface card, a clever workaround was found to overcome the high cost associated with <strong>hard sector formatting</strong> that, besides additional sensors, required extra driver chips to ensure accurate spin control and magnetic data localisation. <strong>Soft sector formatting</strong> requires writing some extra bits on the disk to keep the location of the magnetic bits in sync with expected time windows for magnetic pickup. GCR = Group Code Recording allows this soft alignment encoding, which works best by applying two rules. </p>" 464+"<ul>" 465+"<li>Rule #1: Every byte starts with a bit that is always 1. Hence, every byte has at least one firm sync reminder.</li>" 466+"<li>Rule #2: Only up to two subsequent zeroes. </li>" 467+"</ul>" 468+"<p>The genuine GCR part applies to the seven remaining bits. Since all other ones also keep the pickup windows in check, more than two subsequent zeroes would already cause unacceptable deviations. In the table on the left, we computed 81 compliant combinations, from which only 64 finally encoded six usable bits (throwing away 17 combinations). On the right, the table of 64 values is shown as extracted from a lookup table generated in RAM ($036C-$03D5) by 32 bytes of Woz wizardry on the Apple II interface card ROM. Counting sequences of zero bits in machine code or worse, storing all 64 bytes of lookup table in card ROM would have been overkill. </p>" 469+"<pre>" 470+"; GCR lookup table builder (values 0-63)<br>" 471+"; writing from 036C > 03D5<br>" 472+"<br>" 473+"ORG $Cn00 ; n = slot number<br>" 474+"DOS.1 = $3C<br>" 475+"<br>" 476+" LDX #$20 ; 32<br>" 477+" LDY #$00<br>" 478+" LDX #$03<br>" 479+"L01 STX *DOS.1 ; Store X in DOS register<br>" 480+" TXA<br>" 481+" ASL A ; *2<br>" 482+" BIT *DOS.1 ; AND ACC with DOS register <br>" 483+" BEQ L03 ; JUMP IF ZERO <br>" 484+" ORA *DOS.1 ; OR ACC with DOS register >> put back in ACC<br>" 485+" EOR #$FF ; %11111111 invert all ACC bits <br>" 486+" AND #$7E ; %01111110 remove first & last bit of ACC<br>" 487+"L02 BCS L03<br>" 488+" LSR A <br>" 489+" BNE L02<br>" 490+" TYA <br>" 491+" STA $0356,X ; write in lookup table<br>" 492+" INY <br>" 493+"L03 INX <br>" 494+" BPL L01<br>" 495+"</pre>" 496+"<h3 id=\"sidchipjshtml\">SIDchipJS.html</h3>" 497+"<p><img src=\"https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/SID_chips.png\" align=left width=30% />While emulating AppleII sound is not working out, let's put to work a crazy idea of emulating a C64-style SID chip that could bring us closer to emulating a peripheral that actually did exist for the Apple II: the <a href=\"https://en.wikipedia.org/wiki/Mockingboard\">Mockingboard</a> sound card. The Mochinboard used the AY-3-8910, a 3-voice sound chip found in the popular MSX, and later ZX Spectrum home computers. As we speak, I am evaluating <a href=\"https://github.com/alexanderk23/ayumi-js\">a closer match to emulating the AY-3-8910 with JavaScript</a>
497, as this could bring us to real software and a few games on the Apple II that made full use of the mockingboards capabilities.</p>" 498+"<hr />" 499+"<h2 id=\"gui-modules-explained\">GUI MODULES Explained</h2><hr>" 500+"<p>Similar to the tool catalog demonstrating particular emulator functions, the GUI modules focus on the development of GUI components like tabs, memory maps, visual keyboard. Discover here the entire <a href=\"https://retroapplejs.github.io/tools/GUI_CATALOG.html\">GUI CATALOG</a>.</p>" 501+"<h3 id=\"fontjshtml\">FontJS.html</h3>" 502+"<p>Pictograms from Fontawesome are widely used in this project to generate all sorts of buttons.<br>" 503+"Not all codes generate visible pictograms, therefore this tool to see which are usable and which are not. </p>" 504+"<h3 id=\"tab_ctrl_vhtml\">Tab_ctrl_v*.html</h3>" 505+"<p>This is a fully client-side tab controller that remembers the last clicked tab after a page reload, based on the URI fragment identifier. e.g. <a href=\"http://www.example.com/index.html#tab1\">www.example.com/index.html#tab1</a>" 506+"Subsequent versions of this tab control show increasingly interesting capabilities and design options.</p>" 507+"<table>" 508+"<thead>" 509+"<tr>" 510+"<th id=\"\" style=\"text-align:center;\"></th>" 511+"<th id=\"pop-out<br>menu\" style=\"text-align:center;\">pop-out<br>menu</th>" 512+"<th id=\"sub-<br>menu\" style=\"text-align:center;\">sub-<br>menu</th>" 513+"<th id=\"anima-<br>tion\" style=\"text-align:center;\">anima-<br>tion</th>" 514+"</tr>" 515+"</thead>" 516+"<tbody>" 517+"<tr>" 518+"<td style=\"text-align:center;\">v0</td>" 519+"<td style=\"text-align:center;\">-</td>" 520+"<td style=\"text-align:center;\">-</td>" 521+"<td style=\"text-align:center;\">-</td>" 522+"</tr>" 523+"<tr>" 524+"<td style=\"text-align:center;\">v1</td>" 525+"<td style=\"text-align:center;\">YES</td>" 526+"<td style=\"text-align:center;\">-</td>" 527+"<td style=\"text-align:center;\">-</td>" 528+"</tr>" 529+"<tr>" 530+"<td style=\"text-align:center;\">v2</td>" 531+"<td style=\"text-align:center;\">YES</td>" 532+"<td style=\"text-align:center;\">YES</td>" 533+"<td style=\"text-align:center;\">-</td>" 534+"</tr>" 535+"<tr>" 536+"<td style=\"text-align:center;\">v3</td>" 537+"<td style=\"text-align:center;\">-</td>" 538+"<td style=\"text-align:center;\"></td>" 539+"<td style=\"text-align:center;\">YES</td>" 540+"</tr>" 541+"</tbody>" 542+"</table>" 543 544_DOCS["DEBUGGER"] = "<h2 id=\"debugger\">Debugger</h2><hr>" 545+"<p>This guide gets you from source code to a working step-by-step debugger session as quickly as possible, and then explains the debugger features in more detail.</p>" 546+"<p>The fastest path is:</p>" 547+"<ol>" 548+"<li>Open the <strong>Assembler</strong> tab.</li>" 549+"<li>Assemble the default <code>sample.S</code> source by clicking the blinking <strong>play / assemble</strong> button.</li>" 550+"<li>In the <strong>Listing</strong> pane header, at the far right, click <strong>Send byte code to debugger</strong>.</li>" 551+"<li>The app switches to the <strong>Debugger</strong> tab.</li>" 552+"<li>Click <strong>Step one instruction forward</strong> to start watching execution.</li>" 553+"</ol>" 554+"<p>That is all you need for a first debugging session.</p>" 555+"<hr />" 556+"<h3 id=\"1-quick-start-debug-samples\">1. Quick Start: Debug <code>sample.S</code></h3>" 557+"<p>The Assembler tab already provides a sample source file. The quickest way to create a debugger session is to assemble that source and send the result directly to the debugger.</p>" 558+"<h4 id=\"step-by-step\">Step-by-step</h4>" 559+"<ol>" 560+"<li>Go to the <strong>Assembler</strong> tab.</li>" 561+"<li>Leave the default <code>sample.S</code> source in place.</li>" 562+"<li>Click the blinking <strong>play / assemble</strong> button.</li>" 563+"<li>Check that the <strong>Listing</strong> pane is generated.</li>" 564+"<li>At the far right of the <strong>Listing</strong> pane header, click <strong>Send byte code to debugger</strong>.</li>" 565+"<li>The debugger opens automatically.</li>" 566+"<li>The <strong>Listing</strong> caret is positioned at the source-code origin address.</li>" 567+"<li>A debugger session named <code>sample.DEB</code> is prepared.</li>" 568+"<li>Click <strong>Step one instruction forward</strong>.</li>" 569+"</ol>" 570+"<p>After the first step, the debugger starts showing:</p>" 571+"<ul>" 572+"<li>the current instruction,</li>" 573+"<li>the CPU register state,</li>" 574+"<li>a CPU trace log,</li>" 575+"<li>the CPU Watch pane,</li>" 576+"<li>and the current position in the listing.</li>" 577+"</ul>" 578+"<hr />" 579+"<h3 id=\"2-what-the-assembler-sends-to-the-debugger\">2. What the Assembler Sends to the Debugger</h3>" 580+"<p>The debugger needs executable bytes, a program counter location, and optional human-readable context. The Assembler handoff supplies all of this automatically.</p>" 581+"<pre><code> ââââââââââââââââââââââ<br>" 582+" â sample.S â<br>" 583+" â 6502 source code â<br>" 584+" âââââââââââ¬âââââââââââ<br>" 585+" â Assemble<br>" 586+" â¼<br>" 587+" ââââââââââââââââââââââ<br>" 588+" â Assembler output â<br>" 589+" â â<br>" 590+" â ⢠byte code â<br>" 591+" â ⢠origin address â<br>" 592+" â ⢠listing â<br>" 593+" â ⢠symbol table â<br>" 594+" âââââââââââ¬âââââââââââ<br>" 595+" â Send byte code to debugger<br>" 596+" â¼<br>" 597+" ââââââââââââââââââââââ<br>" 598+" â sample.DEB â<br>" 599+" â debugger session â<br>" 600+" â â<br>" 601+" â ⢠byte code â<br>" 602+" â ⢠symbols â<br>" 603+" â ⢠user settings â<br>" 604+" âââââââââââ¬âââââââââââ<br>" 605+" â Open Debugger tab<br>" 606+" â¼<br>" 607+" ââââââââââââââââââââââ<br>" 608+" â Debugger â<br>" 609+" â â<br>" 610+" â ⢠Listing caret â<br>" 611+" â ⢠CPU Watch â<br>" 612+" â ⢠CPU Trace â<br>" 613+" â ⢠Step controls â<br>" 614+" ââââââââââââââââââââââ</code></pre>" 615+"<p>The <code>.DEB</code> session is a practical debugger container. It holds the byte code, the symbol information supplied by the assembler, and the debugger settings as they are configured at that moment.</p>" 616+"<hr />"
617+"<h3 id=\"3-byte-code--symbols--readable-debugging\">3. Byte Code + Symbols = Readable Debugging</h3>" 618+"<p>The CPU only executes bytes. Symbols do not change execution. Symbols make execution understandable for humans.</p>" 619+"<pre><code> CPU EXECUTES DEBUGGER EXPLAINS<br>" 620+"<br>" 621+" âââââââââââââââââââââââââââââââ âââââââââââââââââââââââââââââââ<br>" 622+" â Byte code â â Symbol table â<br>" 623+" â â â â<br>" 624+" â A9 00 8D 50 C0 â â TXTCLR = $C050 â<br>" 625+" â 20 2F FB â â INIT = $FB2F â<br>" 626+" ââââââââââââââââ¬âââââââââââââââ ââââââââââââââââ¬âââââââââââââââ<br>" 627+" â â<br>" 628+" ââââââââââââââââ¬âââââââââââââââââââââââ<br>" 629+" â¼<br>" 630+" ââââââââââââââââââââââââââââââââââââââââââââââââââââââââââââââââââââââ<br>" 631+" â Human-readable trace/listing â<br>" 632+" â â<br>" 633+" â $FB2F INIT LDA #$00 â<br>" 634+" â $FB31 STA STATUS â<br>" 635+" â $FB33 LDA LORES â<br>" 636+" â $FB35 LDA TXTPAGE1 â<br>" 637+" ââââââââââââââââââââââââââââââââââââââââââââââââââââââââââââââââââââââ</code></pre>" 638+"<p>Without symbols, the debugger can still disassemble instructions, but it may only show raw addresses. With symbols, labels, constants, and comments can be used to make the trace and listing much easier to read.</p>" 639+"<hr />" 640+"<h3 id=\"4-the-debugger-data-sources\">4. The Debugger Data Sources</h3>" 641+"<p>The debugger can be started from different data sources.</p>" 642+"<pre><code> ââââââââââââââââââââââ<br>" 643+" â Debugger session â<br>" 644+" â .DEB â<br>" 645+" âââââââââââ¬âââââââââââ<br>" 646+" â<br>" 647+" â¼<br>" 648+" ââââââââââââââââ ââââââââââââââââââââââ ââââââââââââââââââââââ<br>" 649+" â Assembler âââââââ¶â Byte code âââââââ¶â Emulated memory â<br>" 650+" â output â â loaded at origin â â 64K address space â<br>" 651+" ââââââââââââââââ ââââââââââââââââââââââ âââââââââââ¬âââââââââââ<br>" 652+" â<br>" 653+" ââââââââââââââââ ââââââââââââââââââââââ â<br>" 654+" â Symbol file âââââââ¶â Labels, constants, ââââââââââââââââââ<br>" 655+" â .symbols.jsonâ â comments â â<br>" 656+" ââââââââââââââââ ââââââââââââââââââââââ â<br>" 657+" â<br>" 658+" ââââââââââââââââ âââââââââââââââââââââââ â<br>" 659+" â MemCap âââââââ¶â Full memory image âââââââââââââââââ<br>" 660+" â capture â â copied from emulatorâ â<br>" 661+" ââââââââââââââââ âââââââââââââââââââââââ â<br>" 662+" â¼<br>" 663+" ââââââââââââââââââââââ<br>" 664+" â CPU step / trace â<br>" 665+" â CPU Watch â<br>" 666+" â Listing caret â<br>" 667+" ââââââââââââââââââââââ</code></pre>" 668+"<h4 id=\"main-sources\">Main sources</h4>" 669+"<table>" 670+"<thead>" 671+"<tr>" 672+"<th id=\"source\">Source</th>" 673+"<th id=\"what_it_provides\">What it provides</th>" 674+"<th id=\"typical_use\">Typical use</th>" 675+"</tr>" 676+"</thead>" 677+"<tbody>" 678+"<tr>" 679+"<td>Assembler handoff</td>" 680+"<td>Byte code, origin, symbols, listing context</td>" 681+"<td>Fastest way to debug your own assembler source</td>" 682+"</tr>" 683+"<tr>" 684+"<td><code>.DEB</code> session</td>" 685+"<td>Byte code, symbols, debugger settings</td>" 686+"<td>Reload or share a prepared debug session</td>" 687+"</tr>" 688+"<tr>" 689+"<td>MemCap</td>" 690+"<td>Full 64K memory capture from the emulator</td>" 691+"<td>Debug existing memory state or ROM activity</td>" 692+"</tr>" 693+"<tr>" 694+"<td><code>.symbols.json</code></td>" 695+"<td>Labels, constants, comments</td>" 696+"<td>Make memory dumps and ROM traces readable</td>" 697+"</tr>" 698+"</tbody>" 699+"</table>" 700+"<hr />" 701+"<h3 id=\"5-the-debugger-screen\">5. The Debugger Screen</h3>" 702+"<p>The debugger is centered around three ideas:</p>" 703+"<ol>" 704+"<li><p><strong>Where am I?</strong> <br>" 705+"The Listing caret and Program Counter show the next instruction.</p></li>" 706+"<li><p><strong>What just happened?</strong> <br>" 707+"The CPU Trace shows executed instructions step by step.</p></li>" 708+"<li><p><strong>What changed?</strong> <br>" 709+"The CPU Watch shows registers and flags, highlighting values that changed.</p></li>" 710+"</ol>" 711+"<p>Typical panes:</p>" 712+"<pre><code> ââââââââââââââââââââââââ¬âââââââââââââââââââââââ¬âââââââââââââââââââââââ<br>" 713+" â Listing â CPU Trace â CPU Watch â<br>" 714+" â â â â<br>" 715+" â Source/disassembly â Executed steps â Registers + flags â<br>" 716+" â caret at current PC â one line per step â changed values boxed â<br>" 717+" ââââââââââââââââââââââââ´âââââââââââââââââââââââ´âââââââââââââââââââââââ</code></pre>" 718+"<hr />" 719+"<h3 id=\"6-cpu-watch\">6. CPU Watch</h3>" 720+"<p>
720The CPU Watch pane shows the state of the 6502 CPU.</p>" 721+"<h4 id=\"registers\">Registers</h4>" 722+"<table>" 723+"<thead>" 724+"<tr>" 725+"<th id=\"register\">Register</th>" 726+"<th id=\"meaning\">Meaning</th>" 727+"</tr>" 728+"</thead>" 729+"<tbody>" 730+"<tr>" 731+"<td><code>PC</code></td>" 732+"<td>Program Counter: address of the next instruction</td>" 733+"</tr>" 734+"<tr>" 735+"<td><code>A</code></td>" 736+"<td>Accumulator</td>" 737+"</tr>" 738+"<tr>" 739+"<td><code>X</code></td>" 740+"<td>X register</td>" 741+"</tr>" 742+"<tr>" 743+"<td><code>Y</code></td>" 744+"<td>Y register</td>" 745+"</tr>" 746+"<tr>" 747+"<td><code>SR</code></td>" 748+"<td>Status Register</td>" 749+"</tr>" 750+"<tr>" 751+"<td><code>SP</code></td>" 752+"<td>Stack Pointer</td>" 753+"</tr>" 754+"</tbody>" 755+"</table>" 756+"<h4 id=\"status-flags\">Status flags</h4>" 757+"<p>The <code>SR</code> register contains eight flags, shown from bit 7 to bit 0:</p>" 758+"<table>" 759+"<thead>" 760+"<tr>" 761+"<th id=\"flag\">Flag</th>" 762+"<th id=\"meaning\">Meaning</th>" 763+"</tr>" 764+"</thead>" 765+"<tbody>" 766+"<tr>" 767+"<td><code>N</code></td>" 768+"<td>Negative</td>" 769+"</tr>" 770+"<tr>" 771+"<td><code>V</code></td>" 772+"<td>Overflow</td>" 773+"</tr>" 774+"<tr>" 775+"<td><code>-</code></td>" 776+"<td>Unused / ignored bit</td>" 777+"</tr>" 778+"<tr>" 779+"<td><code>B</code></td>" 780+"<td>Break</td>" 781+"</tr>" 782+"<tr>" 783+"<td><code>D</code></td>" 784+"<td>Decimal mode</td>" 785+"</tr>" 786+"<tr>" 787+"<td><code>I</code></td>" 788+"<td>Interrupt disable</td>" 789+"</tr>" 790+"<tr>" 791+"<td><code>Z</code></td>" 792+"<td>Zero</td>" 793+"</tr>" 794+"<tr>" 795+"<td><code>C</code></td>" 796+"<td>Carry</td>" 797+"</tr>" 798+"</tbody>" 799+"</table>" 800+"<p>Changed values are visually emphasized. For example, after stepping an instruction, the changed register or flag may be shown with a box.</p>" 801+"<pre><code> âââââââââââââââ<br>" 802+" âPC:F802ââA:00â X:00 Y:00 SR:24 SP:FF<br>" 803+" âââââââââââââââ<br>" 804+"<br>" 805+" N:0 V:0 -:1 B:0 D:0 I:1 Z:0 C:0</code></pre>" 806+"<p>The exact layout may vary, but the goal is always the same: quickly show what changed after the last step.</p>" 807+"<hr />" 808+"<h3 id=\"7-cpu-trace\">7. CPU Trace</h3>" 809+"<p>The CPU Trace is a chronological log of executed instructions.</p>" 810+"<p>Each line typically combines:</p>" 811+"<ul>" 812+"<li>the program counter,</li>" 813+"<li>opcode bytes,</li>" 814+"<li>disassembled instruction,</li>" 815+"<li>operands,</li>" 816+"<li>and sometimes register context.</li>" 817+"</ul>" 818+"<p>A trace line is useful when you want to understand execution flow:</p>" 819+"<pre><code> $F800 4A PLOT LSR A<br>" 820+" $F801 08 PHP<br>" 821+" $F802 20 70 F8 JSR GBASCALC<br>" 822+" $F805 28 PLP</code></pre>" 823+"<p>When symbols are available, labels such as <code>PLOT</code> or <code>GBASCALC</code> can appear instead of anonymous addresses.</p>" 824+"<hr />" 825+"<h3 id=\"8-listing-caret-and-origin\">8. Listing Caret and Origin</h3>" 826+"<p>When byte code is sent from the Assembler to the Debugger, the debugger uses the source origin address to place the Listing caret.</p>" 827+"<p>For example:</p>" 828+"<pre><code> ORG $6000</code></pre>" 829+"<p>means that the first assembled byte belongs at <code>$6000</code>.</p>" 830+"<p>The debugger then:</p>" 831+"<ol>" 832+"<li>loads the byte code at the origin address,</li>" 833+"<li>sets the initial Listing caret to that address,</li>" 834+"<li>prepares the CPU/session state,</li>" 835+"<li>waits for you to step forward.</li>" 836+"</ol>" 837+"<p>If the caret or trace starts at the wrong place, first check that the assembled source has the expected <code>ORG</code> value.</p>" 838+"<hr />" 839+"<h3 id=\"9-stepping-through-code\">9. Stepping Through Code</h3>" 840+"<p>Use <strong>Step one instruction forward</strong> to execute exactly one instruction.</p>" 841+"<p>After every step, check:</p>" 842+"<ul>" 843+"<li>the Listing caret,</li>" 844+"<li>the CPU Trace,</li>" 845+"<li>the CPU Watch,</li>" 846+"<li>memory effects if the instruction stores data,</li>" 847+"<li>and flags such as <code>Z</code>, <code>N</code>, or <code>C</code>.</li>" 848+"</ul>" 849+"<p>A typical debugging rhythm is:</p>" 850+"<pre><code> Step â read trace â inspect register changes â compare with source â step again</code></pre>" 851+"<p>This is especially useful for learning or verifying low-level 6502 behavior, because every instruction changes the machine state in a visible way.</p>" 852+"<hr />"
853+"<h3 id=\"10-debugging-with-memcap\">10. Debugging with MemCap</h3>" 854+"<p>The Assembler handoff is the easiest path for your own source code. For emulator memory, ROMs, or already-running code, use <strong>MemCap</strong>.</p>" 855+"<h4 id=\"memcap-workflow\">MemCap workflow</h4>" 856+"<ol>" 857+"<li>In the emulator, use <strong>MemCap</strong> to capture the full memory space.</li>" 858+"<li>Copy the memory capture.</li>" 859+"<li>Go to the Debugger tab.</li>" 860+"<li>Open the <strong>Tools</strong> section.</li>" 861+"<li>Paste the memory capture into the memory input area.</li>" 862+"<li>Load or paste a matching symbol file if available.</li>" 863+"<li>Set or verify the start address / Program Counter.</li>" 864+"<li>Start stepping.</li>" 865+"</ol>" 866+"<h4 id=\"example-symbol-file\">Example symbol file</h4>" 867+"<p>For the Apple II Monitor ROM, a matching symbol file can be loaded from:</p>" 868+"<pre><code> /asm/ROMS/APPLE/APPLE-2 MONITOR ROM.symbols.json</code></pre>" 869+"<p>A memory capture gives the debugger the bytes. The symbol file gives those bytes names and comments.</p>" 870+"<hr />" 871+"<h3 id=\"11-working-with-symbol-files\">11. Working with Symbol Files</h3>" 872+"<p>A symbol file can provide:</p>" 873+"<ul>" 874+"<li>label names,</li>" 875+"<li>named constants,</li>" 876+"<li>comments,</li>" 877+"<li>source hints,</li>" 878+"<li>address annotations.</li>" 879+"</ul>" 880+"<p>This is especially useful for ROM debugging, where the code already exists in memory and you want meaningful trace output.</p>" 881+"<p>Example idea:</p>" 882+"<pre><code> Without symbols:<br>" 883+" $FB2F A9 00 LDA #$00<br>" 884+" $FB31 85 48 STA $48<br>" 885+"<br>" 886+" With symbols:<br>" 887+" $FB2F INIT LDA #$00<br>" 888+" $FB31 STA STATUS</code></pre>" 889+"<p>The bytes are the same. The symbols make the code readable.</p>" 890+"<hr />" 891+"<h3 id=\"12-debugger-sessions\">12. Debugger Sessions</h3>" 892+"<p>A debugger session, such as <code>sample.DEB</code>, collects the state needed to continue or reproduce a debugging setup.</p>" 893+"<p>A session may include:</p>" 894+"<ul>" 895+"<li>byte code,</li>" 896+"<li>origin/start address,</li>" 897+"<li>symbol table data,</li>" 898+"<li>current debugger settings,</li>" 899+"<li>display preferences,</li>" 900+"<li>and other state needed by the debugger.</li>" 901+"</ul>" 902+"<p>The Assembler handoff prepares <code>sample.DEB</code> automatically when you send byte code to the debugger.</p>" 903+"<hr />" 904+"<h3 id=\"13-memory-notes\">13. Memory Notes</h3>" 905+"<p>The Apple II uses a 16-bit address space, so the debugger works with a 64K memory range:</p>" 906+"<pre><code> $0000 âââââââââââââââââââââââââââââââââââââââââââââââ $FFFF</code></pre>" 907+"<p>
907Important regions include:</p>" 908+"<table>" 909+"<thead>" 910+"<tr>" 911+"<th id=\"range\">Range</th>" 912+"<th id=\"meaning\">Meaning</th>" 913+"</tr>" 914+"</thead>" 915+"<tbody>" 916+"<tr>" 917+"<td><code>$0000-$00FF</code></td>" 918+"<td>Zero page</td>" 919+"</tr>" 920+"<tr>" 921+"<td><code>$0100-$01FF</code></td>" 922+"<td>6502 hardware stack</td>" 923+"</tr>" 924+"<tr>" 925+"<td><code>$0200-$03FF</code></td>" 926+"<td>Common low-memory workspace / buffers</td>" 927+"</tr>" 928+"<tr>" 929+"<td><code>$0400-$07FF</code></td>" 930+"<td>Apple II text page 1</td>" 931+"</tr>" 932+"<tr>" 933+"<td><code>$C000-$C0FF</code></td>" 934+"<td>Apple II soft switches / I/O area</td>" 935+"</tr>" 936+"<tr>" 937+"<td><code>$D000-$FFFF</code></td>" 938+"<td>ROM / high memory, depending on configuration</td>" 939+"</tr>" 940+"</tbody>" 941+"</table>" 942+"<p>Exact behavior depends on the current emulator configuration and memory mapping.</p>" 943+"<hr />" 944+"<h3 id=\"14-troubleshooting\">14. Troubleshooting</h3>" 945+"<h4 id=\"the-debugger-opens-but-stepping-starts-at-the-wrong-address\">The debugger opens, but stepping starts at the wrong address</h4>" 946+"<p>Check:</p>" 947+"<ul>" 948+"<li>the assembler <code>ORG</code>,</li>" 949+"<li>the origin address sent to the debugger,</li>" 950+"<li>the current <code>PC</code>,</li>" 951+"<li>and whether the Listing caret was moved manually.</li>" 952+"</ul>" 953+"<h4 id=\"the-trace-shows-raw-addresses-instead-of-labels\">The trace shows raw addresses instead of labels</h4>" 954+"<p>Load a matching symbol file, or use the Assembler handoff so the assembler can provide its symbol table automatically.</p>" 955+"<h4 id=\"the-trace-does-not-match-the-source\">The trace does not match the source</h4>" 956+"<p>Check that:</p>" 957+"<ul>" 958+"<li>the byte code was assembled after the latest source edit,</li>" 959+"<li>the byte code was sent again to the debugger,</li>" 960+"<li>the memory dump matches the symbol file,</li>" 961+"<li>and the Program Counter points into the loaded code.</li>" 962+"</ul>" 963+"<h4 id=\"rom-symbols-look-wrong\">ROM symbols look wrong</h4>" 964+"<p>Make sure the symbol file belongs to the exact ROM image or memory capture you are debugging.</p>" 965+"<h4 id=\"a-memory-capture-does-not-step-correctly\">A memory capture does not step correctly</h4>" 966+"<p>Check that:</p>" 967+"<ul>" 968+"<li>the full memory image was captured,</li>" 969+"<li>it was pasted into the correct Debugger Tools field,</li>" 970+"<li>the start address / PC is correct,</li>" 971+"<li>and the memory image was applied before stepping.</li>" 972+"</ul>" 973+"<hr />" 974+"<h3 id=\"15-practical-first-exercise\">15. Practical First Exercise</h3>" 975+"<p>Use the default sample source.</p>" 976+"<ol>" 977+"<li>Assemble <code>sample.S</code>.</li>" 978+"<li>Send byte code to debugger.</li>" 979+"<li>Click <strong>Step one instruction forward</strong>.</li>" 980+"<li>Watch <code>PC</code> advance.</li>" 981+"<li>Watch any changed register become highlighted.</li>" 982+"<li>Read the CPU Trace line.</li>" 983+"<li>Compare the trace with the Listing caret.</li>" 984+"<li>Repeat.</li>" 985+"</ol>" 986+"<p>After a few steps, the relationship becomes clear:</p>" 987+"<pre><code> Source line â assembled bytes â memory â CPU execution â trace + register changes</code></pre>" 988+"<p>That is the core idea of the RetroAppleJS debugger.</p>" 989 990_DOCS["6502"] = "<h2 id=\"6502-instructions\">6502 INSTRUCTIONS</h2><hr>" 991+"<h3 id=\"table-of-instruction-codes\">Table of instruction codes</h3>" 992+"<blockquote>" 993+" <table>" 994+" <thead>" 995+" <tr>" 996+" <th id=\"\" style=\"text-align:center;\"></th>" 997+" <th id=\"00\" style=\"text-align:center;\">00</th>" 998+" <th id=\"01\" style=\"text-align:center;\">01</th>" 999+" <th id=\"02\" style=\"text-align:center;\">02</th>" 1000+" <th id=\"03\" style=\"text-align:center;\">03</th>" 1001+" <th id=\"04\" style=\"text-align:center;\">04</th>" 1002+" <th id=\"05\" style=\"text-align:center;\">05</th>" 1003+" <th id=\"06\" style=\"text-align:center;\">06</th>" 1004+" <th id=\"07\" style=\"text-align:center;\">07</th>" 1005+" <th id=\"08\" style=\"text-align:center;\">08</th>" 1006+" <th id=\"09\" style=\"text-align:center;\">09</th>" 1007+" <th id=\"0a\" style=\"text-align:center;\">0A</th>" 1008+" <th id=\"0b\" style=\"text-align:center;\">0B</th>" 1009+" <th id=\"0c\" style=\"text-align:center;\">0C</th>" 1010+" <th id=\"0d\" style=\"text-align:center;\">0D</th>" 1011+" <th id=\"0e\" style=\"text-align:center;\">0E</th>" 1012+" <th id=\"0f\" style=\"text-align:center;\">0F</th>" 1013+" </tr>" 1014+" </thead>" 1015+" <tbody>" 1016+" <tr>" 1017+" <td style=\"text-align:center;\">00</td>" 1018+" <td style=\"text-align:center;\">BRKÂ impl</td>" 1019+" <td style=\"text-align:center;\">ORAÂ X,ind</td>" 1020+" <td style=\"text-align:center;\">-</td>" 1021+" <td style=\"text-align:center;\">-</td>" 1022+" <td style=\"text-align:center;\">-</td>" 1023+" <td style=\"text-align:center;\">ORAÂ zpg</td>" 1024+" <td style=\"text-align:center;\">ASLÂ zpg</td>" 1025+" <td style=\"text-align:center;\">-</td>" 1026+" <td style=\"text-align:center;\">PHPÂ impl</td>" 1027+" <td style=\"text-align:center;\">ORAÂ #</td>" 1028+" <td style=\"text-align:center;\">ASLÂ A</td>" 1029+" <td style=\"text-align:center;\">-</td>" 1030+" <td style=\"text-align:center;\">-</td>" 1031+" <td style=\"text-align:center;\">ORAÂ abs</td>" 1032+" <td style=\"text-align:center;\">ASLÂ abs</td>" 1033+" <td style=\"text-align:center;\">-</td>" 1034+" </tr>" 1035+" <tr>" 1036+" <td style=\"text-align:center;\">10</td>" 1037+" <td style=\"text-align:center;\">BPLÂ rel</td>" 1038+" <td style=\"text-align:center;\">ORAÂ ind,Y</td>" 1039+" <td style=\"text-align:center;\">-</td>" 1040+" <td style=\"text-align:center;\">-</td>" 1041+" <td style=\"text-align:center;\">-</td>" 1042+" <td style=\"text-align:center;\">ORAÂ zpg,X</td>" 1043+" <td style=\"text-align:center;\">ASLÂ zpg,X</td>" 1044+" <td style=\"text-align:center;\">-</td>" 1045+" <td style=\"text-align:center;\">CLCÂ impl</td>" 1046+" <td style=\"text-align:center;\">ORAÂ abs,Y</td>" 1047+" <td style=\"text-align:center;\">-</td>" 1048+" <td style=\"text-align:center;\">-</td>" 1049+" <td style=\"text-align:center;\">-</td>" 1050+" <td style=\"text-align:center;\">ORAÂ abs,X</td>" 1051+" <td style=\"text-align:center;\">ASLÂ abs,X</td>" 1052+" <td style=\"text-align:center;\">-</td>" 1053+" </tr>" 1054+" <tr>" 1055+" <td style=\"text-align:center;\">20</td>" 1056+" <td style=\"text-align:center;\">JSRÂ abs</td>" 1057+" <td style=\"text-align:center;\">ANDÂ X,ind</td>" 1058+" <td style=\"text-align:center;\">-</td>" 1059+" <td style=\"text-align:center;\">-</td>" 1060+" <td style=\"text-align:center;\">BITÂ zpg</td>" 1061+" <td style=\"text-align:center;\">ANDÂ zpg</td>" 1062+" <td style=\"text-align:center;\">ROLÂ zpg</td>" 1063+" <td style=\"text-align:center;\">-</td>" 1064+" <td style=\"text-align:center;\">PLPÂ impl</td>" 1065+" <td style=\"text-align:center;\">ANDÂ #</td>" 1066+" <td style=\"text-align:center;\">ROLÂ A</td>" 1067+" <td style=\"text-align:center;\">-</td>" 1068+" <td style=\"text-align:center;\">BITÂ abs</td>" 1069+" <td style=\"text-align:center;\">ANDÂ abs</td>" 1070+" <td style=\"text-align:center;\">ROLÂ abs</td>" 1071+" <td style=\"text-align:center;\">-</td>" 1072+" </tr>" 1073+" <tr>" 1074+" <td style=\"text-align:center;\">30</td>" 1075+" <td style=\"text-align:center;\">BMIÂ rel</td>" 1076+" <td style=\"text-align:center;\">ANDÂ ind,Y</td>" 1077+" <td style=\"text-align:center;\">-</td>" 1078+" <td style=\"text-align:center;\">-</td>" 1079+" <td style=\"text-align:center;\">-</td>" 1080+" <td style=\"text-align:center;\">ANDÂ zpg,X</td>" 1081+" <td style=\"text-align:center;\">ROLÂ zpg,X</td>" 1082+" <td style=\"text-align:center;\">-</td>" 1083+" <td style=\"text-align:center;\">SECÂ impl</td>" 1084+" <td style=\"text-align:center;\">ANDÂ abs,Y</td>" 1085+" <td style=\"text-align:center;\">-</td>" 1086+" <td style=\"text-align:center;\">-</td>" 1087+" <td style=\"text-align:center;\">-</td>" 1088+" <td style=\"text-align:center;\">ANDÂ abs,X</td>" 1089+" <td style=\"text-align:center;\">ROLÂ abs,X</td>" 1090+" <td style=\"text-align:center;\">-</td>" 1091+" </tr>" 1092+" <tr>" 1093+" <td style=\"text-align:center;\">40</td>" 1094+" <td style=\"text-align:center;\">RTIÂ impl</td>" 1095+" <td style=\"text-align:center;\">EORÂ X,ind</td>" 1096+" <td style=\"text-align:center;\">-</td>" 1097+" <td style=\"text-align:center;\">-</td>" 1098+" <td style=\"text-align:center;\">-</td>" 1099+" <td style=\"text-align:center;\">EORÂ zpg</td>" 1100+" <td style=\"text-align:center;\">LSRÂ zpg</td>" 1101+" <td style=\"text-align:center;\">-</td>" 1102+" <td style=\"text-align:center;\">PHAÂ impl</td>" 1103+" <td style=\"text-align:center;\">EORÂ #</td>" 1104+" <td style=\"text-align:center;\">LSRÂ A</td>" 1105+" <td style=\"text-align:center;\">-</td>" 1106+" <td style=\"text-align:center;\">JMPÂ abs</td>" 1107+" <td style=\"text-align:center;\">EORÂ abs</td>" 1108+" <td style=\"text-align:center;\">LSRÂ abs</td>" 1109+" <td style=\"text-align:center;\">-</td>" 1110+" </tr>" 1111+" <tr>" 1112+" <td style=\"text-align:center;\">50</td>" 1113+" <td style=\"text-align:center;\">BVCÂ rel</td>" 1114+" <td style=\"text-align:center;\">EORÂ ind,Y</td>" 1115+" <td style=\"text-align:center;\">-</td>" 1116+" <td style=\"text-align:center;\">-</td>" 1117+" <td style=\"text-align:center;\">-</td>" 1118+" <td style=\"text-align:center;\">EORÂ zpg,X</td>" 1119+" <td style=\"text-align:center;\">LSRÂ zpg,X</td>" 1120+" <td style=\"text-align:center;\">-</td>" 1121+" <td style=\"text-align:center;\">CLIÂ impl</td>" 1122+" <td style=\"text-align:center;\">EORÂ abs,Y</td>" 1123+" <td style=\"text-align:center;\">-</td>" 1124+" <td style=\"text-align:center;\">-</td>" 1125+" <td style=\"text-align:center;\">-</td>" 1126+" <td style=\"text-align:center;\">EORÂ abs,X</td>" 1127+" <td style=\"text-align:center;\">LSRÂ abs,X</td>" 1128+" <td style=\"text-align:center;\">-</td>" 1129+" </tr>" 1130+" <tr>" 1131+" <td style=\"text-align:center;\">60</td>" 1132+" <td style=\"text-align:center;\">RTSÂ impl</td>" 1133+" <td style=\"text-align:center;\">ADCÂ X,ind</td>" 1134+" <td style=\"text-align:center;\">-</td>" 1135+" <td style=\"text-align:center;\">-</td>" 1136+" <td style=\"text-align:center;\">-</td>" 1137+" <td style=\"text-align:center;\">ADCÂ zpg</td>" 1138+" <td style=\"text-align:center;\">RORÂ zpg</td>" 1139+" <td style=\"text-align:center;\">-</td>" 1140+" <td style=\"text-align:center;\">PLAÂ impl</td>" 1141+" <td style=\"text-align:center;\">ADCÂ #</td>" 1142+" <td style=\"text-align:center;\">RORÂ A</td>" 1143+" <td style=\"text-align:center;\">-</td>" 1144+" <td style=\"text-align:center;\">JMPÂ ind</td>" 1145+" <td style=\"text-align:center;\">ADCÂ abs</td>" 1146+" <td style=\"text-align:center;\">RORÂ abs</td>" 1147+" <td style=\"text-align:center;\">-</td>" 1148+" </tr>" 1149+" <tr>" 1150+" <td style=\"text-align:center;\">70</td>" 1151+" <td style=\"text-align:center;\">BVSÂ rel</td>" 1152+" <td style=\"text-align:center;\">ADCÂ ind,Y</td>" 1153+" <td style=\"text-align:center;\">-</td>" 1154+" <td style=\"text-align:center;\">-</td>" 1155+" <td style=\"text-align:center;\">-</td>" 1156+" <td style=\"text-align:center;\">ADCÂ zpg,X</td>" 1157+" <td style=\"text-align:center;\">RORÂ zpg,X</td>" 1158+" <td style=\"text-align:center;\">-</td>" 1159+" <td style=\"text-align:center;\">SEIÂ impl</td>" 1160+" <td style=\"text-align:center;\">ADCÂ abs,Y</td>" 1161+" <td style=\"text-align:center;\">-</td>" 1162+" <td style=\"text-align:center;\">-</td>" 1163+" <td style=\"text-align:center;\">-</td>" 1164+" <td style=\"text-align:center;\">ADCÂ abs,X</td>" 1165+" <td style=\"text-align:center;\">RORÂ abs,X</td>" 1166+" <td style=\"text-align:center;\">-</td>" 1167+" </tr>" 1168+" <tr>" 1169+" <td style=\"text-align:center;\">80</td>" 1170+" <td style=\"text-align:center;\">-</td>" 1171+" <td style=\"text-align:center;\">STAÂ X,ind</td>" 1172+" <td style=\"text-align:center;\">-</td>" 1173+" <td style=\"text-align:center;\">-</td>" 1174+" <td style=\"text-align:center;\">STYÂ zpg</td>" 1175+" <td style=\"text-align:center;\">STAÂ zpg</td>" 1176+" <td style=\"text-align:center;\">STXÂ zpg</td>" 1177+" <td style=\"text-align:center;\">-</td>" 1178+" <td style=\"text-align:center;\">DEYÂ impl</td>" 1179+" <td style=\"text-align:center;\">-</td>" 1180+" <td style=\"text-align:center;\">TXAÂ impl</td>" 1181+" <td style=\"text-align:center;\">-</td>" 1182+" <td style=\"text-align:center;\">STYÂ abs</td>" 1183+" <td style=\"text-align:center;\">STAÂ abs</td>" 1184+" <td style=\"text-align:center;\">STXÂ abs</td>" 1185+" <td style=\"text-align:center;\">-</td>" 1186+" </tr>" 1187+" <tr>" 1188+" <td style=\"text-align:center;\">90</td>" 1189+" <td style=\"text-align:center;\">BCCÂ rel</td>" 1190+" <td style=\"text-align:center;\">STAÂ ind,Y</td>" 1191+" <td style=\"text-align:center;\">-</td>" 1192+" <td style=\"text-align:center;\">-</td>" 1193+" <td style=\"text-align:center;\">STYÂ zpg,X</td>" 1194+" <td style=\"text-align:center;\">STAÂ zpg,X</td>" 1195+" <td style=\"text-align:center;\">STXÂ zpg,Y</td>" 1196+" <td style=\"text-align:center;\">-</td>" 1197+" <td style=\"text-align:center;\">TYAÂ impl</td>" 1198+" <td style=\"text-align:center;\">STAÂ abs,Y</td>" 1199+" <td style=\"text-align:center;\">TXSÂ impl</td>" 1200+" <td style=\"text-align:center;\">-</td>" 1201+" <td style=\"text-align:center;\">-</td>" 1202+" <td style=\"text-align:center;\">STAÂ abs,X</td>" 1203+" <td style=\"text-align:center;\">-</td>" 1204+" <td style=\"text-align:center;\">-</td>" 1205+" </tr>" 1206+" <tr>" 1207+" <td style=\"text-align:center;\">A0</td>" 1208+" <td style=\"text-align:center;\">LDYÂ #</td>" 1209+" <td style=\"text-align:center;\">LDAÂ X,ind</td>" 1210+" <td style=\"text-align:center;\">LDXÂ #</td>" 1211+" <td style=\"text-align:center;\">-</td>" 1212+" <td style=\"text-align:center;\">LDYÂ zpg</td>" 1213+" <td style=\"text-align:center;\">LDAÂ zpg</td>" 1214+" <td style=\"text-align:center;\">LDXÂ zpg</td>" 1215+" <td style=\"text-align:center;\">-</td>" 1216+" <td style=\"text-align:center;\">TAYÂ impl</td>" 1217+" <td style=\"text-align:center;\">LDAÂ #</td>" 1218+" <td style=\"text-align:center;\">TAXÂ impl</td>" 1219+" <td style=\"text-align:center;\">-</td>" 1220+" <td style=\"text-align:center;\">LDYÂ abs</td>" 1221+" <td style=\"text-align:center;\">LDAÂ abs</td>" 1222+" <td style=\"text-align:center;\">LDXÂ abs</td>" 1223+" <td style=\"text-align:center;\">-</td>" 1224+" </tr>" 1225+" <tr>" 1226+" <td style=\"text-align:center;\">B0</td>" 1227+" <td style=\"text-align:center;\">BCSÂ rel</td>" 1228+" <td style=\"text-align:center;\">LDAÂ ind,Y</td>" 1229+" <td style=\"text-align:center;\">-</td>" 1230+" <td style=\"text-align:center;\">-</td>" 1231+" <td style=\"text-align:center;\">LDYÂ zpg,X</td>" 1232+" <td style=\"text-align:center;\">LDAÂ zpg,X</td>" 1233+" <td style=\"text-align:center;\">LDXÂ zpg,Y</td>" 1234+" <td style=\"text-align:center;\">-</td>" 1235+" <td style=\"text-align:center;\">CLVÂ impl</td>" 1236+" <td style=\"text-align:center;\">LDAÂ abs,Y</td>" 1237+" <td style=\"text-align:center;\">TSXÂ impl</td>" 1238+" <td style=\"text-align:center;\">->
1238</td>" 1239+" <td style=\"text-align:center;\">LDYÂ abs,X</td>" 1240+" <td style=\"text-align:center;\">LDAÂ abs,X</td>" 1241+" <td style=\"text-align:center;\">LDXÂ abs,Y</td>" 1242+" <td style=\"text-align:center;\">-</td>" 1243+" </tr>" 1244+" <tr>" 1245+" <td style=\"text-align:center;\">C0</td>" 1246+" <td style=\"text-align:center;\">CPYÂ #</td>" 1247+" <td style=\"text-align:center;\">CMPÂ X,ind</td>" 1248+" <td style=\"text-align:center;\">-</td>" 1249+" <td style=\"text-align:center;\">-</td>" 1250+" <td style=\"text-align:center;\">CPYÂ zpg</td>" 1251+" <td style=\"text-align:center;\">CMPÂ zpg</td>" 1252+" <td style=\"text-align:center;\">DECÂ zpg</td>" 1253+" <td style=\"text-align:center;\">-</td>" 1254+" <td style=\"text-align:center;\">INYÂ impl</td>" 1255+" <td style=\"text-align:center;\">CMPÂ #</td>" 1256+" <td style=\"text-align:center;\">DEXÂ impl</td>" 1257+" <td style=\"text-align:center;\">-</td>" 1258+" <td style=\"text-align:center;\">CPYÂ abs</td>" 1259+" <td style=\"text-align:center;\">CMPÂ abs</td>" 1260+" <td style=\"text-align:center;\">DECÂ abs</td>" 1261+" <td style=\"text-align:center;\">-</td>" 1262+" </tr>" 1263+" <tr>" 1264+" <td style=\"text-align:center;\">D0</td>" 1265+" <td style=\"text-align:center;\">BNEÂ rel</td>" 1266+" <td style=\"text-align:center;\">CMPÂ ind,Y</td>" 1267+" <td style=\"text-align:center;\">-</td>" 1268+" <td style=\"text-align:center;\">-</td>" 1269+" <td style=\"text-align:center;\">-</td>" 1270+" <td style=\"text-align:center;\">CMPÂ zpg,X</td>" 1271+" <td style=\"text-align:center;\">DECÂ zpg,X</td>" 1272+" <td style=\"text-align:center;\">-</td>" 1273+" <td style=\"text-align:center;\">CLDÂ impl</td>" 1274+" <td style=\"text-align:center;\">CMPÂ abs,Y</td>" 1275+" <td style=\"text-align:center;\">-</td>" 1276+" <td style=\"text-align:center;\">-</td>" 1277+" <td style=\"text-align:center;\">-</td>" 1278+" <td style=\"text-align:center;\">CMPÂ abs,X</td>" 1279+" <td style=\"text-align:center;\">DECÂ abs,X</td>" 1280+" <td style=\"text-align:center;\">-</td>" 1281+" </tr>" 1282+" <tr>" 1283+" <td style=\"text-align:center;\">E0</td>" 1284+" <td style=\"text-align:center;\">CPXÂ #</td>" 1285+" <td style=\"text-align:center;\">SBCÂ X,ind</td>" 1286+" <td style=\"text-align:center;\">-</td>" 1287+" <td style=\"text-align:center;\">-</td>" 1288+" <td style=\"text-align:center;\">CPXÂ zpg</td>" 1289+" <td style=\"text-align:center;\">SBCÂ zpg</td>" 1290+" <td style=\"text-align:center;\">INCÂ zpg</td>" 1291+" <td style=\"text-align:center;\">-</td>" 1292+" <td style=\"text-align:center;\">INXÂ impl</td>" 1293+" <td style=\"text-align:center;\">SBCÂ #</td>" 1294+" <td style=\"text-align:center;\">NOPÂ impl</td>" 1295+" <td style=\"text-align:center;\">-</td>" 1296+" <td style=\"text-align:center;\">CPXÂ abs</td>" 1297+" <td style=\"text-align:center;\">SBCÂ abs</td>" 1298+" <td style=\"text-align:center;\">INCÂ abs</td>" 1299+" <td style=\"text-align:center;\">-</td>" 1300+" </tr>" 1301+" <tr>" 1302+" <td style=\"text-align:center;\">F0</td>" 1303+" <td style=\"text-align:center;\">BEQÂ rel</td>" 1304+" <td style=\"text-align:center;\">SBCÂ ind,Y</td>" 1305+" <td style=\"text-align:center;\">-</td>" 1306+" <td style=\"text-align:center;\">-</td>" 1307+" <td style=\"text-align:center;\">-</td>" 1308+" <td style=\"text-align:center;\">SBCÂ zpg,X</td>" 1309+" <td style=\"text-align:center;\">INCÂ zpg,X</td>" 1310+" <td style=\"text-align:center;\">-</td>" 1311+" <td style=\"text-align:center;\">SEDÂ impl</td>" 1312+" <td style=\"text-align:center;\">SBCÂ abs,Y</td>" 1313+" <td style=\"text-align:center;\">-</td>" 1314+" <td style=\"text-align:center;\">-</td>" 1315+" <td style=\"text-align:center;\">-</td>" 1316+" <td style=\"text-align:center;\">SBCÂ abs,X</td>" 1317+" <td style=\"text-align:center;\">INCÂ abs,X</td>" 1318+" <td style=\"text-align:center;\"></td>" 1319+" </tr>" 1320+" </tbody>" 1321+" </table>" 1322+"</blockquote>" 1323+"<h3 id=\"address-modes\">Address Modes</h3>" 1324+"<pre><code> A .... Accumulator OPC A operand is AC (implied single byte instruction) <br>" 1325+" abs .... absolute OPC $LLHH operand is address $HHLL * <br>" 1326+" abs,X .... absolute, X-indexed OPC $LLHH,X operand is address; effective address is address incremented by X with carry ** <br>" 1327+" abs,Y .... absolute, Y-indexed OPC $LLHH,Y operand is address; effective address is address incremented by Y with carry ** <br>" 1328+" # .... immediate OPC #$BB operand is byte BB <br>" 1329+" impl .... implied OPC operand implied <br>" 1330+" ind .... indirect OPC ($LLHH) operand is address; effective address is contents of word at address: C.w($HHLL) <br>" 1331+" X,ind .... X-indexed, indirect OPC ($LL,X) operand is zeropage address; effective address is word in (LL + X, LL + X + 1), inc. without carry: C.w($00LL + X) <br>" 1332+" ind,Y .... indirect, Y-indexed OPC ($LL),Y operand is zeropage address; effective address is word in (LL, LL + 1) incremented by Y with carry: C.w($00LL) + Y <br>" 1333+" rel .... relative OPC $BB branch target is PC + signed offset BB *** <br>" 1334+" zpg .... zeropage OPC $LL operand is zeropage address (hi-byte is zero, address = $00LL) <br>" 1335+" zpg,X .... zeropage, X-indexed OPC $LL,X operand is zeropage address; effective address is address incremented by X without carry ** <br>" 1336+" zpg,Y .... zeropage, Y-indexed OPC $LL,Y operand is zeropage address; effective address is address incremented by Y without carry ** <br>" 1337+"<br>" 1338+" * 16-bit address words are little-endian, lo(w)-byte first, followed by the hi(gh)-byte. <br>" 1339+" (An assembler will use a human readable, big-endian notation as in $HHLL.) <br>" 1340+"<br>" 1341+" ** The available 16-bit address space is conceived as consisting of pages of 256 bytes each, with <br>" 1342+" address hi-bytes representing the page index. An increment with carry may affect the hi-byte <br>" 1343+" and may thus result in a crossing of page boundaries, adding an extra cycle to the execution. <br>" 1344+" Increments without carry do not affect the hi-byte of an address and no page transitions do occur. <br>" 1345+" Generally, increments of 16-bit addresses include a carry, increments of zeropage addresses don't. <br>" 1346+" Notably this is not related in any way to the state of the carry bit of the accumulator. <br>" 1347+"<br>" 1348+" *** Branch offsets are signed 8-bit values, -128 ... +127, negative offsets in two's complement. <br>" 1349+" Page transitions may occur and add an extra cycle to the execution. </code></pre>"
1350+"<h3 id=\"a-nametab4_instr_by_nameainstructions-by-name\"><a name=\"tab4_INSTR_BY_NAME\"></a>Instructions by Name</h3>" 1351+"<p><b><div contentEditable=false></b>" 1352+"<a href=\"#tab4_ADC\" title=\"instruction details for ADC...\">ADC</a> â¦. add with carry <br>" 1353+"<a href=\"#tab4_AND\" title=\"instruction details for AND...\">AND</a> â¦. and (with accumulator) <br>" 1354+"<a href=\"#tab4_ASL\" title=\"instruction details for ASL...\">ASL</a> â¦. arithmetic shift left <br>" 1355+"<a href=\"#tab4_BCC\" title=\"instruction details for BCC...\">BCC</a> â¦. branch on carry clear <br>" 1356+"<a href=\"#tab4_BCS\" title=\"instruction details for BCS...\">BCS</a> â¦. branch on carry set <br>" 1357+"<a href=\"#tab4_BEQ\" title=\"instruction details for BEQ...\">BEQ</a> â¦. branch on equal (zero set) <br>" 1358+"<a href=\"#tab4_BIT\" title=\"instruction details for BIT...\">BIT</a> â¦. bit test <br>" 1359+"<a href=\"#tab4_BMI\" title=\"instruction details for BMI...\">BMI</a> â¦. branch on minus (negative set) <br>" 1360+"<a href=\"#tab4_BNE\" title=\"instruction details for BNE...\">BNE</a> â¦. branch on not equal (zero clear) <br>" 1361+"<a href=\"#tab4_BPL\" title=\"instruction details for BPL...\">BPL</a> â¦. branch on plus (negative clear) <br>" 1362+"<a href=\"#tab4_BRK\" title=\"instruction details for BRK...\">BRK</a> â¦. break interrupt <br>" 1363+"<a href=\"#tab4_BVC\" title=\"instruction details for BVC...\">BVC</a> â¦. branch on overflow clear <br>" 1364+"<a href=\"#tab4_BVS\" title=\"instruction details for BVS...\">BVS</a> â¦. branch on overflow set <br>" 1365+"<a href=\"#tab4_CLC\" title=\"instruction details for CLC...\">CLC</a> â¦. clear carry <br>" 1366+"<a href=\"#tab4_CLD\" title=\"instruction details for CLD...\">CLD</a> â¦. clear decimal <br>" 1367+"<a href=\"#tab4_CLI\" title=\"instruction details for CLI...\">CLI</a> â¦. clear interrupt disable <br>" 1368+"<a href=\"#tab4_CLV\" title=\"instruction details for CLV...\">CLV</a> â¦. clear overflow <br>" 1369+"<a href=\"#tab4_CMP\" title=\"instruction details for CMP...\">CMP</a> â¦. compare (with accumulator) <br>" 1370+"<a href=\"#tab4_CPX\" title=\"instruction details for CPX...\">CPX</a> â¦. compare with X <br>" 1371+"<a href=\"#tab4_CPY\" title=\"instruction details for CPY...\">CPY</a> â¦. compare with Y <br>" 1372+"<a href=\"#tab4_DEC\" title=\"instruction details for DEC...\">DEC</a> â¦. decrement <br>" 1373+"<a href=\"#tab4_DEX\" title=\"instruction details for DEX...\">DEX</a> â¦. decrement X <br>" 1374+"<a href=\"#tab4_DEY\" title=\"instruction details for DEY...\">DEY</a> â¦. decrement Y <br>" 1375+"<a href=\"#tab4_EOR\" title=\"instruction details for EOR...\">EOR</a> â¦. exclusive or (with accumulator) <br>" 1376+"<a href=\"#tab4_INC\" title=\"instruction details for INC...\">INC</a> â¦. increment <br>" 1377+"<a href=\"#tab4_INX\" title=\"instruction details for INX...\">INX</a> â¦. increment X <br>" 1378+"<a href=\"#tab4_INY\" title=\"instruction details for INY...\">INY</a> â¦. increment Y <br>" 1379+"<a href=\"#tab4_JMP\" title=\"instruction details for JMP...\">JMP</a> â¦. jump <br>" 1380+"<a href=\"#tab4_JSR\" title=\"instruction details for JSR...\">JSR</a> â¦. jump subroutine <br>" 1381+"<a href=\"#tab4_LDA\" title=\"instruction details for LDA...\">LDA</a> â¦. load accumulator <br>" 1382+"<a href=\"#tab4_LDX\" title=\"instruction details for LDX...\">LDX</a> â¦. load X <br>" 1383+"<a href=\"#tab4_LDY\" title=\"instruction details for LDY...\">LDY</a> â¦. load Y <br>" 1384+"<a href=\"#tab4_LSR\" title=\"instruction details for LSR...\">LSR</a> â¦. logical shift right <br>" 1385+"<a href=\"#tab4_NOP\" title=\"instruction details for NOP...\">NOP</a> â¦. no operation <br>" 1386+"<a href=\"#tab4_ORA\" title=\"instruction details for ORA...\">ORA</a> â¦. or with accumulator <br>" 1387+"<a href=\"#tab4_PHA\" title=\"instruction details for PHA...\">PHA</a> â¦. push accumulator <br>" 1388+"<a href=\"#tab4_PHP\" title=\"instruction details for PHP...\">PHP</a> â¦. push processor status (SR) <br>" 1389+"<a href=\"#tab4_PLA\" title=\"instruction details for PLA...\">PLA</a> â¦. pull accumulator <br>" 1390+"<a href=\"#tab4_PLP\" title=\"instruction details for PLP...\">PLP</a> â¦. pull processor status (SR) <br>" 1391+"<a href=\"#tab4_ROL\" title=\"instruction details for ROL...\">ROL</a> â¦. rotate left <br>" 1392+"<a href=\"#tab4_ROR\" title=\"instruction details for ROR...\">ROR</a> â¦. rotate right <br>" 1393+"<a href=\"#tab4_RTI\" title=\"instruction details for RTI...\">RTI</a> â¦. return from interrupt <br>" 1394+"<a href=\"#tab4_RTS\" title=\"instruction details for RTS...\">RTS</a> â¦. return from subroutine <br>"
1395+"<a href=\"#tab4_SBC\" title=\"instruction details for SBC...\">SBC</a> â¦. subtract with carry <br>" 1396+"<a href=\"#tab4_SEC\" title=\"instruction details for SEC...\">SEC</a> â¦. set carry <br>" 1397+"<a href=\"#tab4_SED\" title=\"instruction details for SED...\">SED</a> â¦. set decimal <br>" 1398+"<a href=\"#tab4_SEI\" title=\"instruction details for SEI...\">SEI</a> â¦. set interrupt disable <br>" 1399+"<a href=\"#tab4_STA\" title=\"instruction details for STA...\">STA</a> â¦. store accumulator <br>" 1400+"<a href=\"#tab4_STX\" title=\"instruction details for STX...\">STX</a> â¦. store X <br>" 1401+"<a href=\"#tab4_STY\" title=\"instruction details for STY...\">STY</a> â¦. store Y <br>" 1402+"<a href=\"#tab4_TAX\" title=\"instruction details for TAX...\">TAX</a> â¦. transfer accumulator to X <br>" 1403+"<a href=\"#tab4_TAY\" title=\"instruction details for TAY...\">TAY</a> â¦. transfer accumulator to Y <br>" 1404+"<a href=\"#tab4_TSX\" title=\"instruction details for TSX...\">TSX</a> â¦. transfer stack pointer to X <br>" 1405+"<a href=\"#tab4_TXA\" title=\"instruction details for TXA...\">TXA</a> â¦. transfer X to accumulator <br>" 1406+"<a href=\"#tab4_TXS\" title=\"instruction details for TXS...\">TXS</a> â¦. transfer X to stack pointer <br>" 1407+"<a href=\"#tab4_TYA\" title=\"instruction details for TYA...\">TYA</a> â¦. transfer Y to accumulator <br>" 1408+"</div></p>" 1409+"<h3 id=\"registers\">Registers</h3>" 1410+"<pre><code> PC .... program counter (16 bit)<br>" 1411+" AC .... accumulator (8 bit)<br>" 1412+" X .... X register (8 bit)<br>" 1413+" Y .... Y register (8 bit)<br>" 1414+" SR .... status register [NV-BDIZC] (8 bit)<br>" 1415+" SP .... stack pointer (8 bit)</code></pre>" 1416+"<h3 id=\"status-register-flags-bit-7-to-bit-0\">Status Register Flags (bit 7 to bit 0)</h3>" 1417+"<pre><code> N .... Negative<br>" 1418+" V .... Overflow<br>" 1419+" - .... ignored<br>" 1420+" B .... Break<br>" 1421+" D .... Decimal (use BCD for arithmetics)<br>" 1422+" I .... Interrupt (IRQ disable)<br>" 1423+" Z .... Zero<br>" 1424+" C .... Carry</code></pre>" 1425+"<h3 id=\"processor-stack\">Processor Stack</h3>" 1426+"<p>LIFO, top down, 8 bit range, 0x0100 - 0x01FF </p>" 1427+"<h3 id=\"bytes-words-addressing\">Bytes, Words, Addressing</h3>" 1428+"<ul>" 1429+"<li>8 bit bytes, 16 bit words in lobyte-hibyte representation (Little-Endian). </li>" 1430+"<li>16 bit address range, operands follow instruction codes.</li>" 1431+"<li>Signed values are two's complement, sign in bit 7 (most significant bit). <br>" 1432+"(%11111111 = $FF = -1, %10000000 = $80 = -128, %01111111 = $7F = +127) </li>" 1433+"</ul>" 1434+"<h3 id=\"vendor\">Vendor</h3>" 1435+"<p>MOS Technology, 1975 <br>" 1436+"<img src=\"https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/MOS_6502AD_300.png\" alt=\"MOS Techology 6502 MPU\" title=\"MOS Techology 6502 MPU\" /></p>" 1437+"<h2 id=\"appendix-a-6502-instructions-in-detail\">APPENDIX A: 6502 Instructions in Detail</h2><hr>" 1438+"<p><b><div contentEditable=false></b></p>" 1439+"<h3 id=\"a-nametab4_adcaadc---add-memory-to-accumulator-with-carry---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_ADC\"></a>ADC - Add Memory to Accumulator with Carry - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1440+"<pre><code> A + M + C -> A, C N Z C I D V<br>" 1441+" + + + - - +<br>" 1442+"<br>" 1443+" addressing assembler opc bytes cyles<br>" 1444+" --------------------------------------------<br>" 1445+" immidiate ADC #oper 69 2 2<br>" 1446+" zeropage ADC oper 65 2 3<br>" 1447+" zeropage,X ADC oper,X 75 2 4<br>" 1448+" absolute ADC oper 6D 3 4<br>" 1449+" absolute,X ADC oper,X 7D 3 4\*<br>" 1450+" absolute,Y ADC oper,Y 79 3 4\*<br>" 1451+" (indirect,X) ADC (oper,X) 61 2 6<br>" 1452+" (indirect),Y ADC (oper),Y 71 2 5\*</code></pre>" 1453+"<h3 id=\"a-nametab4_andaand---and-memory-with-accumulator---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_AND\"></a>AND - AND Memory with Accumulator - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1454+"<pre><code> A AND M -> A N Z C I D V<br>" 1455+" + + - - - -<br>" 1456+"<br>" 1457+" addressing assembler opc bytes cyles<br>" 1458+" --------------------------------------------<br>" 1459+" immidiate AND #oper 29 2 2<br>" 1460+" zeropage AND oper 25 2 3<br>" 1461+" zeropage,X AND oper,X 35 2 4<br>" 1462+" absolute AND oper 2D 3 4<br>" 1463+" absolute,X AND oper,X 3D 3 4\*<br>" 1464+" absolute,Y AND oper,Y 39 3 4\*<br>" 1465+" (indirect,X) AND (oper,X) 21 2 6<br>" 1466+" (indirect),Y AND (oper),Y 31 2 5\*</code></pre>"
1467+"<h3 id=\"a-nametab4_aslaasl---shift-left-one-bit-memory-or-accumulator---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_ASL\"></a>ASL - Shift Left One Bit (Memory or Accumulator) - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1468+"<pre><code> C <- \[76543210\] <- 0 N Z C I D V<br>" 1469+" + + + - - -<br>" 1470+"<br>" 1471+" addressing assembler opc bytes cyles<br>" 1472+" --------------------------------------------<br>" 1473+" accumulator ASL A 0A 1 2<br>" 1474+" zeropage ASL oper 06 2 5<br>" 1475+" zeropage,X ASL oper,X 16 2 6<br>" 1476+" absolute ASL oper 0E 3 6<br>" 1477+" absolute,X ASL oper,X 1E 3 7</code></pre>" 1478+"<h3 id=\"a-nametab4_bccabcc---branch-on-carry-clear---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_BCC\"></a>BCC - Branch on Carry Clear - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1479+"<pre><code> branch on C = 0 N Z C I D V<br>" 1480+" - - - - - -<br>" 1481+"<br>" 1482+" addressing assembler opc bytes cyles<br>" 1483+" --------------------------------------------<br>" 1484+" relative BCC oper 90 2 2\*\*</code></pre>" 1485+"<h3 id=\"a-nametab4_bcsabcs---branch-on-carry-set---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_BCS\"></a>BCS - Branch on Carry Set - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1486+"<pre><code> branch on C = 1 N Z C I D V<br>" 1487+" - - - - - -<br>" 1488+"<br>" 1489+" addressing assembler opc bytes cyles<br>" 1490+" --------------------------------------------<br>" 1491+" relative BCS oper B0 2 2\*\*</code></pre>" 1492+"<h3 id=\"a-nametab4_beqabeq---branch-on-result-zero---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_BEQ\"></a>BEQ - Branch on Result Zero - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1493+"<pre><code> branch on Z = 1 N Z C I D V<br>" 1494+" - - - - - -<br>" 1495+"<br>" 1496+" addressing assembler opc bytes cyles<br>" 1497+" --------------------------------------------<br>" 1498+" relative BEQ oper F0 2 2\*\*</code></pre>" 1499+"<h3 id=\"a-nametab4_bitabit---test-bits-in-memory-with-accumulator---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_BIT\"></a>BIT - Test Bits in Memory with Accumulator - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1500+"<pre><code> bits 7 and 6 of operand are transfered to bit 7 and 6 of SR (N,V);<br>" 1501+" the zeroflag is set to the result of operand AND accumulator.<br>" 1502+"<br>" 1503+" A AND M, M7 -> N, M6 -> V N Z C I D V<br>" 1504+" M7 + - - - M6<br>" 1505+"<br>" 1506+" addressing assembler opc bytes cyles<br>" 1507+" --------------------------------------------<br>" 1508+" zeropage BIT oper 24 2 3<br>" 1509+" absolute BIT oper 2C 3 4</code></pre>" 1510+"<h3 id=\"a-nametab4_bmiabmi---branch-on-result-minus---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_BMI\"></a>BMI - Branch on Result Minus - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1511+"<pre><code> branch on N = 1 N Z C I D V<br>" 1512+" - - - - - -<br>" 1513+"<br>" 1514+" addressing assembler opc bytes cyles<br>" 1515+" --------------------------------------------<br>" 1516+" relative BMI oper 30 2 2\*\*</code></pre>" 1517+"<h3 id=\"a-nametab4_bneabne---branch-on-result-not-zero---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_BNE\"></a>BNE - Branch on Result not Zero - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1518+"<pre><code> branch on Z = 0 N Z C I D V<br>" 1519+" - - - - - -<br>" 1520+"<br>" 1521+" addressing assembler opc bytes cyles<br>" 1522+" --------------------------------------------<br>" 1523+" relative BNE oper D0 2 2\*\*</code></pre>" 1524+"<h3 id=\"a-nametab4_bplabpl---branch-on-result-plus---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_BPL\"></a>BPL - Branch on Result Plus - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1525+"<pre><code> branch on N = 0 N Z C I D V<br>" 1526+" - - - - - -<br>" 1527+"<br>" 1528+" addressing assembler opc bytes cyles<br>" 1529+" --------------------------------------------<br>" 1530+" relative BPL oper 10 2 2\*\*</code></pre>" 1531+"<h3 id=\"a-nametab4_brkabrk---force-break---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_BRK\"></a>BRK - Force Break - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1532+"<pre><code> interrupt, N Z C I D V<br>" 1533+" push PC+2, push SR - - - 1 - -<br>" 1534+"<br>" 1535+" addressing assembler opc bytes cyles<br>" 1536+" --------------------------------------------<br>" 1537+" implied BRK 00 1 7</code></pre>" 1538+"<h3 id=\"a-nametab4_bvcabvc---branch-on-overflow-clear---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_BVC\"></a>BVC - Branch on Overflow Clear - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1539+"<pre><code> branch on V = 0 N Z C I D V<br>" 1540+" - - - - - -<br>" 1541+"<br>" 1542+" addressing assembler opc bytes cyles<br>" 1543+" --------------------------------------------<br>" 1544+" relative BVC oper 50 2 2\*\*</code></pre>" 1545+"<h3 id=\"a-nametab4_bvsabvs---branch-on-overflow-set---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_BVS\"></a>BVS - Branch on Overflow Set - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1546+"<pre><code> branch on V = 1 N Z C I D V<br>" 1547+" - - - - - -<br>" 1548+"<br>" 1549+" addressing assembler opc bytes cyles<br>" 1550+" --------------------------------------------<br>" 1551+" relative BVC oper 70 2 2\*\*</code></pre>" 1552+"<h3 id=\"a-nametab4_clcaclc---clear-carry-flag---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_CLC\"></a>CLC - Clear Carry Flag - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1553+"<pre><code> 0 -> C N Z C I D V<br>" 1554+" - - 0 - - -<br>" 1555+"<br>" 1556+" addressing assembler opc bytes cyles<br>" 1557+" --------------------------------------------<br>" 1558+" implied CLC 18 1 2</code></pre>" 1559+"<h3 id=\"a-nametab4_cldacld---clear-decimal-mode---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_CLD\"></a>CLD - Clear Decimal Mode - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1560+"<pre><code> 0 -> D N Z C I D V<br>" 1561+" - - - - 0 -<br>" 1562+"<br>" 1563+" addressing assembler opc bytes cyles<br>" 1564+" --------------------------------------------<br>" 1565+" implied CLD D8 1 2</code></pre>" 1566+"<h3 id=\"a-nametab4_cliacli---clear-interrupt-disable-bit---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_CLI\"></a>CLI - Clear Interrupt Disable Bit - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1567+"<pre><code> 0 -> I N Z C I D V<br>" 1568+" - - - 0 - -<br>" 1569+"<br>" 1570+" addressing assembler opc bytes cyles<br>" 1571+" --------------------------------------------<br>" 1572+" implied CLI 58 1 2</code></pre>" 1573+"<h3 id=\"a-nametab4_clvaclv---clear-overflow-flag---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_CLV\"></a>CLV - Clear Overflow Flag - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1574+"<pre><code> 0 -> V N Z C I D V<br>" 1575+" - - - - - 0<br>" 1576+"<br>" 1577+" addressing assembler opc bytes cyles<br>" 1578+" --------------------------------------------<br>" 1579+" implied CLV B8 1 2</code></pre>" 1580+"<h3 id=\"a-nametab4_cmpacmp---compare-memory-with-accumulator---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_CMP\"></a>CMP - Compare Memory with Accumulator - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1581+"<pre><code> A - M N Z C I D V<br>" 1582+" + + + - - -<br>" 1583+"<br>" 1584+" addressing assembler opc bytes cyles<br>" 1585+" --------------------------------------------<br>" 1586+" immidiate CMP #oper C9 2 2<br>" 1587+" zeropage CMP oper C5 2 3<br>" 1588+" zeropage,X CMP oper,X D5 2 4<br>" 1589+" absolute CMP oper CD 3 4<br>" 1590+" absolute,X CMP oper,X DD 3 4\*<br>" 1591+" absolute,Y CMP oper,Y D9 3 4\*<br>" 1592+" (indirect,X) CMP (oper,X) C1 2 6<br>" 1593+" (indirect),Y CMP (oper),Y D1 2 5\*</code></pre>" 1594+"<h3 id=\"a-nametab4_cpxacpx---compare-memory-and-index-x---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_CPX\"></a>CPX - Compare Memory and Index X - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1595+"<pre><code> X - M N Z C I D V<br>" 1596+" + + + - - -<br>" 1597+"<br>" 1598+" addressing assembler opc bytes cyles<br>" 1599+" --------------------------------------------<br>" 1600+" immidiate CPX #oper E0 2 2<br>" 1601+" zeropage CPX oper E4 2 3<br>" 1602+" absolute CPX oper EC 3 4</code></pre>" 1603+"<h3 id=\"a-nametab4_cpyacpy---compare-memory-and-index-y---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_CPY\"></a>CPY - Compare Memory and Index Y - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1604+"<pre><code> Y - M N Z C I D V<br>" 1605+" + + + - - -<br>" 1606+"<br>" 1607+" addressing assembler opc bytes cyles<br>" 1608+" --------------------------------------------<br>" 1609+" immidiate CPY #oper C0 2 2<br>" 1610+" zeropage CPY oper C4 2 3<br>" 1611+" absolute CPY oper CC 3 4</code></pre>" 1612+"<h3 id=\"a-nametab4_decadec---decrement-memory-by-one---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_DEC\"></a>DEC - Decrement Memory by One - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1613+"<pre><code> M - 1 -> M N Z C I D V<br>" 1614+" + + - - - -<br>" 1615+"<br>" 1616+" addressing assembler opc bytes cyles<br>" 1617+" --------------------------------------------<br>" 1618+" zeropage DEC oper C6 2 5<br>" 1619+" zeropage,X DEC oper,X D6 2 6<br>" 1620+" absolute DEC oper CE 3 6<br>" 1621+" absolute,X DEC oper,X DE 3 7</code></pre>" 1622+"<h3 id=\"a-nametab4_dexadex---decrement-index-x-by-one---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_DEX\"></a>DEX - Decrement Index X by One - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1623+"<pre><code> X - 1 -> X N Z C I D V<br>" 1624+" + + - - - -<br>" 1625+"<br>" 1626+" addressing assembler opc bytes cyles<br>" 1627+" --------------------------------------------<br>" 1628+" implied DEC CA 1 2</code></pre>" 1629+"<h3 id=\"a-nametab4_deyadey---decrement-index-y-by-one---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_DEY\"></a>
1629DEY - Decrement Index Y by One - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1630+"<pre><code> Y - 1 -> Y N Z C I D V<br>" 1631+" + + - - - -<br>" 1632+"<br>" 1633+" addressing assembler opc bytes cyles<br>" 1634+" --------------------------------------------<br>" 1635+" implied DEC 88 1 2</code></pre>" 1636+"<h3 id=\"a-nametab4_eoraeor---exclusive-or-memory-with-accumulator---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_EOR\"></a>EOR - Exclusive-OR Memory with Accumulator - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1637+"<pre><code> A EOR M -> A N Z C I D V<br>" 1638+" + + - - - -<br>" 1639+"<br>" 1640+" addressing assembler opc bytes cyles<br>" 1641+" --------------------------------------------<br>" 1642+" immidiate EOR #oper 49 2 2<br>" 1643+" zeropage EOR oper 45 2 3<br>" 1644+" zeropage,X EOR oper,X 55 2 4<br>" 1645+" absolute EOR oper 4D 3 4<br>" 1646+" absolute,X EOR oper,X 5D 3 4\*<br>" 1647+" absolute,Y EOR oper,Y 59 3 4\*<br>" 1648+" (indirect,X) EOR (oper,X) 41 2 6<br>" 1649+" (indirect),Y EOR (oper),Y 51 2 5\*</code></pre>" 1650+"<h3 id=\"a-nametab4_incainc---increment-memory-by-one---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_INC\"></a>INC - Increment Memory by One - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1651+"<pre><code> M + 1 -> M N Z C I D V<br>" 1652+" + + - - - -<br>" 1653+"<br>" 1654+" addressing assembler opc bytes cyles<br>" 1655+" --------------------------------------------<br>" 1656+" zeropage INC oper E6 2 5<br>" 1657+" zeropage,X INC oper,X F6 2 6<br>" 1658+" absolute INC oper EE 3 6<br>" 1659+" absolute,X INC oper,X FE 3 7</code></pre>" 1660+"<h3 id=\"a-nametab4_inxainx---increment-index-x-by-one---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_INX\"></a>INX - Increment Index X by One - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1661+"<pre><code> X + 1 -> X N Z C I D V<br>" 1662+" + + - - - -<br>" 1663+"<br>" 1664+" addressing assembler opc bytes cyles<br>" 1665+" --------------------------------------------<br>" 1666+" implied INX E8 1 2</code></pre>" 1667+"<h3 id=\"a-nametab4_inyainy---increment-index-y-by-one---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_INY\"></a>INY - Increment Index Y by One - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1668+"<pre><code> Y + 1 -> Y N Z C I D V<br>" 1669+" + + - - - -<br>" 1670+"<br>" 1671+" addressing assembler opc bytes cyles<br>" 1672+" --------------------------------------------<br>" 1673+" implied INY C8 1 2</code></pre>" 1674+"<h3 id=\"a-nametab4_jmpajmp---jump-to-new-location---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_JMP\"></a>JMP - Jump to New Location - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1675+"<pre><code> (PC+1) -> PCL N Z C I D V<br>" 1676+" (PC+2) -> PCH - - - - - -<br>" 1677+"<br>" 1678+" addressing assembler opc bytes cyles<br>" 1679+" --------------------------------------------<br>" 1680+" absolute JMP oper 4C 3 3<br>" 1681+" indirect JMP (oper) 6C 3 5</code></pre>" 1682+"<h3 id=\"a-nametab4_jsrajsr---jump-to-new-location-saving-return-address---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_JSR\"></a>JSR - Jump to New Location Saving Return Address - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1683+"<pre><code> push (PC+2), N Z C I D V<br>" 1684+" (PC+1) -> PCL - - - - - -<br>" 1685+" (PC+2) -> PCH<br>" 1686+"<br>" 1687+" addressing assembler opc bytes cyles<br>" 1688+" --------------------------------------------<br>" 1689+" absolute JSR oper 20 3 6</code></pre>" 1690+"<h3 id=\"a-nametab4_ldaalda---load-accumulator-with-memory---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_LDA\"></a>LDA - Load Accumulator with Memory - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1691+"<pre><code> M -> A N Z C I D V<br>" 1692+" + + - - - -<br>" 1693+"<br>" 1694+" addressing assembler opc bytes cyles<br>" 1695+" --------------------------------------------<br>" 1696+" immidiate LDA #oper A9 2 2<br>" 1697+" zeropage LDA oper A5 2 3<br>" 1698+" zeropage,X LDA oper,X B5 2 4<br>" 1699+" absolute LDA oper AD 3 4<br>" 1700+" absolute,X LDA oper,X BD 3 4\*<br>" 1701+" absolute,Y LDA oper,Y B9 3 4\*<br>" 1702+" (indirect,X) LDA (oper,X) A1 2 6<br>" 1703+" (indirect),Y LDA (oper),Y B1 2 5\*</code></pre>" 1704+"<h3 id=\"a-nametab4_ldxaldx---load-index-x-with-memory---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_LDX\"></a>LDX - Load Index X with Memory - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1705+"<pre><code> M -> X N Z C I D V<br>" 1706+" + + - - - -<br>" 1707+"<br>" 1708+" addressing assembler opc bytes cyles<br>" 1709+" --------------------------------------------<br>" 1710+" immidiate LDX #oper A2 2 2<br>" 1711+" zeropage LDX oper A6 2 3<br>" 1712+" zeropage,Y LDX oper,Y B6 2 4<br>" 1713+" absolute LDX oper AE 3 4<br>" 1714+" absolute,Y LDX oper,Y BE 3 4\*</code></pre>" 1715+"<h3 id=\"a-nametab4_ldyaldy---load-index-y-with-memory---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_LDY\"></a>LDY - Load Index Y with Memory - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1716+"<pre><code> M -> Y N Z C I D V<br>" 1717+" + + - - - -<br>" 1718+"<br>" 1719+" addressing assembler opc bytes cyles<br>" 1720+" --------------------------------------------<br>" 1721+" immidiate LDY #oper A0 2 2<br>" 1722+" zeropage LDY oper A4 2 3<br>" 1723+" zeropage,X LDY oper,X B4 2 4<br>" 1724+" absolute LDY oper AC 3 4<br>" 1725+" absolute,X LDY oper,X BC 3 4\*</code></pre>"
1726+"<h3 id=\"a-nametab4_lsralsr---shift-one-bit-right-memory-or-accumulator---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_LSR\"></a>LSR - Shift One Bit Right (Memory or Accumulator) - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1727+"<pre><code> 0 -> \[76543210\] -> C N Z C I D V<br>" 1728+" 0 + + - - -<br>" 1729+"<br>" 1730+" addressing assembler opc bytes cyles<br>" 1731+" --------------------------------------------<br>" 1732+" accumulator LSR A 4A 1 2<br>" 1733+" zeropage LSR oper 46 2 5<br>" 1734+" zeropage,X LSR oper,X 56 2 6<br>" 1735+" absolute LSR oper 4E 3 6<br>" 1736+" absolute,X LSR oper,X 5E 3 7</code></pre>" 1737+"<h3 id=\"a-nametab4_nopanop---no-operation---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_NOP\"></a>NOP - No Operation - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1738+"<pre><code> --- N Z C I D V<br>" 1739+" - - - - - -<br>" 1740+"<br>" 1741+" addressing assembler opc bytes cyles<br>" 1742+" --------------------------------------------<br>" 1743+" implied NOP EA 1 2</code></pre>" 1744+"<h3 id=\"a-nametab4_oraaora---or-memory-with-accumulator---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_ORA\"></a>ORA - OR Memory with Accumulator - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1745+"<pre><code> A OR M -> A N Z C I D V<br>" 1746+" + + - - - -<br>" 1747+"<br>" 1748+" addressing assembler opc bytes cyles<br>" 1749+" --------------------------------------------<br>" 1750+" immidiate ORA #oper 09 2 2<br>" 1751+" zeropage ORA oper 05 2 3<br>" 1752+" zeropage,X ORA oper,X 15 2 4<br>" 1753+" absolute ORA oper 0D 3 4<br>" 1754+" absolute,X ORA oper,X 1D 3 4\*<br>" 1755+" absolute,Y ORA oper,Y 19 3 4\*<br>" 1756+" (indirect,X) ORA (oper,X) 01 2 6<br>" 1757+" (indirect),Y ORA (oper),Y 11 2 5\*</code></pre>" 1758+"<h3 id=\"a-nametab4_phaapha---push-accumulator-on-stack---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_PHA\"></a>PHA - Push Accumulator on Stack - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1759+"<pre><code> push A N Z C I D V<br>" 1760+" - - - - - -<br>" 1761+"<br>" 1762+" addressing assembler opc bytes cyles<br>" 1763+" --------------------------------------------<br>" 1764+" implied PHA 48 1 3</code></pre>" 1765+"<h3 id=\"a-nametab4_phpaphp---push-processor-status-on-stack---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_PHP\"></a>PHP - Push Processor Status on Stack - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1766+"<pre><code> push SR N Z C I D V<br>" 1767+" - - - - - -<br>" 1768+"<br>" 1769+" addressing assembler opc bytes cyles<br>" 1770+" --------------------------------------------<br>" 1771+" implied PHP 08 1 3</code></pre>" 1772+"<h3 id=\"a-nametab4_plaapla---pull-accumulator-from-stack---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_PLA\"></a>PLA - Pull Accumulator from Stack - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1773+"<pre><code> pull A N Z C I D V<br>" 1774+" + + - - - -<br>" 1775+"<br>" 1776+" addressing assembler opc bytes cyles<br>" 1777+" --------------------------------------------<br>" 1778+" implied PLA 68 1 4</code></pre>" 1779+"<h3 id=\"a-nametab4_plpaplp---pull-processor-status-from-stack---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_PLP\"></a>PLP - Pull Processor Status from Stack - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1780+"<pre><code> pull SR N Z C I D V<br>" 1781+" from stack<br>" 1782+"<br>" 1783+" addressing assembler opc bytes cyles<br>" 1784+" --------------------------------------------<br>" 1785+" implied PLP 28 1 4</code></pre>" 1786+"<h3 id=\"a-nametab4_rolarol---rotate-one-bit-left-memory-or-accumulator---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_ROL\"></a>ROL - Rotate One Bit Left (Memory or Accumulator) - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1787+"<pre><code> C <- \[76543210\] <- C N Z C I D V<br>" 1788+" + + + - - -<br>" 1789+"<br>" 1790+" addressing assembler opc bytes cyles<br>" 1791+" --------------------------------------------<br>" 1792+" accumulator ROL A 2A 1 2<br>" 1793+" zeropage ROL oper 26 2 5<br>" 1794+" zeropage,X ROL oper,X 36 2 6<br>" 1795+" absolute ROL oper 2E 3 6<br>" 1796+" absolute,X ROL oper,X 3E 3 7</code></pre>" 1797+"<h3 id=\"a-nametab4_roraror---rotate-one-bit-right-memory-or-accumulator---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_ROR\"></a>ROR - Rotate One Bit Right (Memory or Accumulator) - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1798+"<pre><code> C -> \[76543210\] -> C N Z C I D V<br>" 1799+" + + + - - -<br>" 1800+"<br>" 1801+" addressing assembler opc bytes cyles<br>" 1802+" --------------------------------------------<br>" 1803+" accumulator ROR A 6A 1 2<br>" 1804+" zeropage ROR oper 66 2 5<br>" 1805+" zeropage,X ROR oper,X 76 2 6<br>" 1806+" absolute ROR oper 6E 3 6<br>" 1807+" absolute,X ROR oper,X 7E 3 7</code></pre>" 1808+"<h3 id=\"a-nametab4_rtiarti---return-from-interrupt---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_RTI\"></a>RTI - Return from Interrupt - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1809+"<pre><code> pull SR, pull PC N Z C I D V<br>" 1810+" from stack<br>" 1811+"<br>" 1812+" addressing assembler opc bytes cyles<br>" 1813+" --------------------------------------------<br>" 1814+" implied RTI 40 1 6</code></pre>" 1815+"<h3 id=\"a-nametab4_rtsarts---return-from-subroutine---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_RTS\"></a>RTS - Return from Subroutine - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1816+"<pre><code> pull PC, PC+1 -> PC N Z C I D V<br>" 1817+" - - - - - -<br>" 1818+"<br>" 1819+" addressing assembler opc bytes cyles<br>" 1820+" --------------------------------------------<br>" 1821+" implied RTS 60 1 6</code></pre>" 1822+"<h3 id=\"a-nametab4_sbcasbc---subtract-memory-from-accumulator-with-borrow---toptab4_instr_by_name-instructions-by-name\">
1822<a name=\"tab4_SBC\"></a>SBC - Subtract Memory from Accumulator with Borrow - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1823+"<pre><code> A - M - C -> A N Z C I D V<br>" 1824+" + + + - - +<br>" 1825+"<br>" 1826+" addressing assembler opc bytes cyles<br>" 1827+" --------------------------------------------<br>" 1828+" immidiate SBC #oper E9 2 2<br>" 1829+" zeropage SBC oper E5 2 3<br>" 1830+" zeropage,X SBC oper,X F5 2 4<br>" 1831+" absolute SBC oper ED 3 4<br>" 1832+" absolute,X SBC oper,X FD 3 4\*<br>" 1833+" absolute,Y SBC oper,Y F9 3 4\*<br>" 1834+" (indirect,X) SBC (oper,X) E1 2 6<br>" 1835+" (indirect),Y SBC (oper),Y F1 2 5\*</code></pre>" 1836+"<h3 id=\"a-nametab4_secasec---set-carry-flag---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_SEC\"></a>SEC - Set Carry Flag - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1837+"<pre><code> 1 -> C N Z C I D V<br>" 1838+" - - 1 - - -<br>" 1839+"<br>" 1840+" addressing assembler opc bytes cyles<br>" 1841+" --------------------------------------------<br>" 1842+" implied SEC 38 1 2</code></pre>" 1843+"<h3 id=\"a-nametab4_sedased---set-decimal-flag---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_SED\"></a>SED - Set Decimal Flag - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1844+"<pre><code> 1 -> D N Z C I D V<br>" 1845+" - - - - 1 -<br>" 1846+"<br>" 1847+" addressing assembler opc bytes cyles<br>" 1848+" --------------------------------------------<br>" 1849+" implied SED F8 1 2</code></pre>" 1850+"<h3 id=\"a-nametab4_seiasei---set-interrupt-disable-status---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_SEI\"></a>SEI - Set Interrupt Disable Status - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1851+"<pre><code> 1 -> I N Z C I D V<br>" 1852+" - - - 1 - -<br>" 1853+"<br>" 1854+" addressing assembler opc bytes cyles<br>" 1855+" --------------------------------------------<br>" 1856+" implied SEI 78 1 2</code></pre>" 1857+"<h3 id=\"a-nametab4_staasta---store-accumulator-in-memory---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_STA\"></a>STA - Store Accumulator in Memory - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1858+"<pre><code> A -> M N Z C I D V<br>" 1859+" - - - - - -<br>" 1860+"<br>" 1861+" addressing assembler opc bytes cyles<br>" 1862+" --------------------------------------------<br>" 1863+" zeropage STA oper 85 2 3<br>" 1864+" zeropage,X STA oper,X 95 2 4<br>" 1865+" absolute STA oper 8D 3 4<br>" 1866+" absolute,X STA oper,X 9D 3 5<br>" 1867+" absolute,Y STA oper,Y 99 3 5<br>" 1868+" (indirect,X) STA (oper,X) 81 2 6<br>" 1869+" (indirect),Y STA (oper),Y 91 2 6</code></pre>" 1870+"<h3 id=\"a-nametab4_stxastx---store-index-x-in-memory---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_STX\"></a>STX - Store Index X in Memory - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1871+"<pre><code> X -> M N Z C I D V<br>" 1872+" - - - - - -<br>" 1873+"<br>" 1874+" addressing assembler opc bytes cyles<br>" 1875+" --------------------------------------------<br>" 1876+" zeropage STX oper 86 2 3<br>" 1877+" zeropage,Y STX oper,Y 96 2 4<br>" 1878+" absolute STX oper 8E 3 4</code></pre>" 1879+"<h3 id=\"a-nametab4_styasty---sore-index-y-in-memory---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_STY\"></a>STY - Sore Index Y in Memory - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1880+"<pre><code> Y -> M N Z C I D V<br>" 1881+" - - - - - -<br>" 1882+"<br>" 1883+" addressing assembler opc bytes cyles<br>" 1884+" --------------------------------------------<br>" 1885+" zeropage STY oper 84 2 3<br>" 1886+" zeropage,X STY oper,X 94 2 4<br>" 1887+" absolute STY oper 8C 3 4</code></pre>" 1888+"<h3 id=\"a-nametab4_taxatax---transfer-accumulator-to-index-x---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_TAX\"></a>TAX - Transfer Accumulator to Index X - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1889+"<pre><code> A -> X N Z C I D V<br>" 1890+" + + - - - -<br>" 1891+"<br>" 1892+" addressing assembler opc bytes cyles<br>" 1893+" --------------------------------------------<br>" 1894+" implied TAX AA 1 2</code></pre>" 1895+"<h3 id=\"a-nametab4_tayatay---transfer-accumulator-to-index-y---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_TAY\"></a>TAY - Transfer Accumulator to Index Y - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1896+"<pre><code> A -> Y N Z C I D V<br>" 1897+" + + - - - -<br>" 1898+"<br>" 1899+" addressing assembler opc bytes cyles<br>" 1900+" --------------------------------------------<br>" 1901+" implied TAY A8 1 2</code></pre>" 1902+"<h3 id=\"a-nametab4_tsxatsx---transfer-stack-pointer-to-index-x---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_TSX\"></a>TSX - Transfer Stack Pointer to Index X - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1903+"<pre><code> SP -> X N Z C I D V<br>" 1904+" + + - - - -<br>" 1905+"<br>" 1906+" addressing assembler opc bytes cyles<br>" 1907+" --------------------------------------------<br>" 1908+" implied TSX BA 1 2</code></pre>" 1909+"<h3 id=\"a-nametab4_txaatxa---transfer-index-x-to-accumulator---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_TXA\"></a>TXA - Transfer Index X to Accumulator - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1910+"<pre><code> X -> A N Z C I D V<br>" 1911+" + + - - - -<br>" 1912+"<br>" 1913+" addressing assembler opc bytes cyles<br>" 1914+" --------------------------------------------<br>" 1915+" implied TXA 8A 1 2</code></pre>" 1916+"<h3 id=\"a-nametab4_txsatxs---transfer-index-x-to-stack-register---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_TXS\"></a>TXS - Transfer Index X to Stack Register - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1917+"<pre><code> X -> SP N Z C I D V<br>" 1918+" - - - - - -<br>" 1919+"<br>" 1920+" addressing assembler opc bytes cyles<br>" 1921+" --------------------------------------------<br>" 1922+" implied TXS 9A 1 2</code></pre>" 1923+"<h3 id=\"a-nametab4_tyaatya---transfer-index-y-to-accumulator---toptab4_instr_by_name-instructions-by-name\"><a name=\"tab4_TYA\"></a>TYA - Transfer Index Y to Accumulator - <a href=\"#tab4_INSTR_BY_NAME\" title=\"instructions by name\">top</a></h3>" 1924+"<pre><code> Y -> A N Z C I D V<br>" 1925+" + + - - - -<br>" 1926+"<br>" 1927+" addressing assembler opc bytes cyles<br>" 1928+" --------------------------------------------<br>" 1929+" implied TYA 98 1 2</code></pre>" 1930+"<p></div></p>" 1931+"<p><em>* add 1 to cycles if page boundery is crossed</em></p>" 1932+"<p><em>** add 1 to cycles if branch occurs on same page, add 2 to cycles if branch occurs to different page</em></p>" 1933+"<h4 id=\"legend-to-flags\">Legend to Flags</h4>" 1934+"<pre><code> + .... modified<br>" 1935+" - .... not modified<br>" 1936+" 1 .... set<br>" 1937+" 0 .... cleared<br>" 1938+" M6 .... memory bit 6<br>" 1939+" M7 .... memory bit 7</code></pre>" 1940+"<p>Note on assembler syntax:<br>" 1941+"Most assemblers employ \"OPC *oper\" for forced zeropage addressing.</p>" 1942+"<h2 id=\"appendix-b-6502-jump-vectors-and-stack-operations\">Appendix B: 6502 Jump Vectors and Stack Operations</h2><hr>" 1943+"<p>The 256 bytes processor stack of the 6502 is located at $0100 ⦠$01FF in <br>" 1944+"memory, growing down from top to bottom. <br>" 1945+"There are three 2-byte address locations at the very top end of the 64K address <br>" 1946+"space serving as jump vectors for reset/startup and interrupt operations:</p>" 1947+"<pre><code> $FFFA, $FFFB ... NMI (Non-Maskable Interrupt) vector <br>" 1948+" $FFFC, $FFFD ... RES (Reset) vector <br>" 1949+" $FFFE, $FFFF ... IRQ (Interrupt Request) vector</code></pre>" 1950+"<p>At the occurrence of an interrupt, the value of the program counter (PC) is put in <br>" 1951+"high-low order onto the stack, followed by the value currently in the status <br>" 1952+"register and control will be transferred to the address location found in the <br>" 1953+"respective interrupt vector. These are recovered from the stack at the end of <br>" 1954+"an interrupt routine by the RTI instruction.</p>" 1955+"<p><img src=\"https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/mcs6502-interrupt-ops_340.png\" alt=\"6502 Interrupt Operations\" /> </p>" 1956+"<p>(Image: MCS6502 Instruction Set Summary, MOS Technology, Inc.)</p>" 1957+"<p>Similarly, as a JSR instruction is encountered, PC is dumped onto the stack <br>" 1958+"and recovered by the JSR instruction:</p>" 1959+"<p><img src=\"https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/mcs6502-jsr-rts-ops_340.png\" alt=\"6502 Subroutine Operations\" /></p>" 1960+"<p>(Image: MCS6502 Instruction Set Summary, MOS Technology, Inc.)</p>" 1961 1962_DOCS["ASSEMBLER"] = "<h2 id=\"assembler-instructions\">ASSEMBLER Instructions</h2><hr>" 1963+"<p>This is a simple 2 pass assembler for the 65xx microprocessor. It is thought to accompany the emulator To get your source code
1963compiled:</p>" 1964+"<ol>" 1965+"<li>Enter your src in \"source code\" pane.</li>" 1966+"<li>Click the button \"assemble\".</li>" 1967+"<li>Watch progress in \"listing\" pane.</li>" 1968+"<li>Copy the object code \"to emulator\" or \"to debugger\"<br></li>" 1969+"</ol>" 1970+"<h3 id=\"syntax-reference\">Syntax reference</h3>" 1971+"<p>Unlike other 6502 assemblers; this retrocomuting project was characterised to support a multitude of assembler syntaxes, allowing to copy old listings from internet sources and old magazines and bring them back to life. Whereas the notation of 6502 commands remains constant between compilers, pragmas, also called assembler directives can be quite distinct in nature. In this journey we're making an attempt to support the following well-documented macro-assemblers available for the 6502 microprocessor: <a href=\"\">ca65](http://john.ccac.rwth-aachen.de:8000/as/as_EN.html), [Macroassembler AS (ASL)</a>, <a href=\"https://dasm-assembler.github.io\">DASM</a>, <a href=\"https://mirrors.apple2.org.za/ftp.apple.asimov.net/documentation/applications/misc/Merlin%20-%20A%20Macro%20Assembler%20%28SDS%2C%201983%29%20OCR.pdf\">Merlin</a>, <a href=\"https://www.txbobsc.com/scsc/scassembler/SCMacroAssembler20.pdf\">S-C</a>and <a href=\"https://www.mixinc.net/atari/mac65.htm\">MAC/65</a>.</p>" 1972+"<h2 id=\"assembler-pragmas\">ASSEMBLER Pragmas</h2><hr>" 1973+"<table>" 1974+"<thead>" 1975+"<tr>" 1976+"<th id=\"argument\" style=\"text-align:left;\">Argument</th>" 1977+"<th id=\"description\" style=\"text-align:left;\">Description</th>" 1978+"</tr>" 1979+"</thead>" 1980+"<tbody>" 1981+"<tr>" 1982+"<td style=\"text-align:left;\">adrw</td>" 1983+"<td style=\"text-align:left;\">address bus width</td>" 1984+"</tr>" 1985+"<tr>" 1986+"<td style=\"text-align:left;\">bpe</td>" 1987+"<td style=\"text-align:left;\">bits per element</td>" 1988+"</tr>" 1989+"<tr>" 1990+"<td style=\"text-align:left;\">csv</td>" 1991+"<td style=\"text-align:left;\">0=single (default)<br>1=comma separated</td>" 1992+"</tr>" 1993+"<tr>" 1994+"<td style=\"text-align:left;\">typ</td>" 1995+"<td style=\"text-align:left;\">exp = expression (default), hex = hex number</td>" 1996+"</tr>" 1997+"</tbody>" 1998+"</table>" 1999+"<table>" 2000+"<thead>" 2001+"<tr>" 2002+"<th id=\"[directive]\" style=\"text-align:left;\">[DIRECTIVE]</th>" 2003+"<th id=\"arguments\" style=\"text-align:left;\">Arguments</th>" 2004+"<th id=\"(partial)_/_full<br>support\" style=\"text-align:left;\">(Partial) / Full<br>support</th>" 2005+"<th id=\"description\" style=\"text-align:left;\">Description</th>" 2006+"</tr>" 2007+"</thead>" 2008+"<tbody>" 2009+"<tr>" 2010+"<td style=\"text-align:left;\">.BYTE,DFB</td>" 2011+"<td style=\"text-align:left;\">E { <strong>csv</strong>:{<strong>typ</strong>:exp, <strong>bpe</strong>:8}}</td>" 2012+"<td style=\"text-align:left;\">ca65,Merlin</td>" 2013+"<td style=\"text-align:left;\"><a href=\"https://cc65.github.io/doc/ca65.html#ss11.10\">link</a></td>" 2014+"</tr>" 2015+"<tr>" 2016+"<td style=\"text-align:left;\">.ORG,ORG,.OR,*=</td>" 2017+"<td style=\"text-align:left;\">E { <strong>exp</strong>:{<strong>bpe</strong>:adrw}</td>" 2018+"<td style=\"text-align:left;\">ca65,S-C</td>" 2019+"<td style=\"text-align:left;\"><a href=\"https://cc65.github.io/doc/ca65.html#.ORG\">link</a></td>" 2020+"</tr>" 2021+"<tr>" 2022+"<td style=\"text-align:left;\">HEX</td>" 2023+"<td style=\"text-align:left;\">E { <strong>ssv</strong>:{<strong>typ</strong>:hex,<strong>bpe</strong>:8}</td>" 2024+"<td style=\"text-align:left;\">Merlin</td>" 2025+"<td style=\"text-align:left;\"></td>" 2026+"</tr>" 2027+"<tr>" 2028+"<td style=\"text-align:left;\">ASC6</td>" 2029+"<td style=\"text-align:left;\">packed 6-bit character string</td>" 2030+"<td style=\"text-align:left;\">RetroAppleJS</td>" 2031+"<td style=\"text-align:left;\">Packs ASCII <code>$20-$5F</code>, four characters per three bytes</td>" 2032+"</tr>" 2033+"<tr>" 2034+"<td style=\"text-align:left;\">.ASSERT</td>" 2035+"<td style=\"text-align:left;\">expression,severity,message</td>" 2036+"<td style=\"text-align:left;\">ca65 / RetroAppleJS</td>" 2037+"<td style=\"text-align:left;\">Compile-time assertion; severity is <code>error</code> or <code>warning</code></td>" 2038+"</tr>" 2039+"</tbody>" 2040+"</table>" 2041+"<h4 id=\"opcodes-and-addressing\">Opcodes and Addressing</h4>" 2042+"<p>Opcodes are always 3 letter mnemonics followed by an (optional) operand/address:</p>" 2043+"<pre><code> OPC .... implied (mode 0)<br>" 2044+" OPC A .... Accumulator (mode 1)<br>" 2045+" OPC #BB .... immediate (mode 2)<br>" 2046+" OPC HHLL .... absolute (mode 3)<br>" 2047+" OPC HHLL,X .... absolute, X-indexed (mode 4)<br>" 2048+" OPC HHLL,Y .... absolute, Y-indexed (mode 5)<br>" 2049+" OPC *LL .... zeropage (mode 6)<br>" 2050+" OPC *LL,X .... zeropage, X-indexed (mode 7)<br>" 2051+" OPC *LL,Y .... zeropage, Y-indexed (mode 8)<br>" 2052+" OPC (BB,X) .... X-indexed, indirect (mode 9)<br>" 2053+" OPC (LL),Y .... indirect, Y-indexed (mode 10)<br>" 2054+" OPC (HHLL) .... indirect (mode 11)<br>" 2055+" OPC BB .... relative (mode 12)</code></pre>" 2056+"<p>Where HHLL is a 16bit word and LL or BB an 8 bit byte, and A is Accumulator (not mandatory unless ambiguous).<br>" 2057+"There must not be any white space in any part of an instruction's address.</p>" 2058+"<h4 id=\"number-formats\">Number Formats</h4>" 2059+"<pre><code> $[0-9A-Fa-f] .... hex<br>" 2060+" %[01] .... binary<br>" 2061+" 0[0-7] .... octal<br>" 2062+" [0-9] .... decimal<br>" 2063+" < .... LO-byte portion<br>" 2064+" > .... HI-byte portion</code></pre>" 2065+"<p>Comparison operators are also accepted in expressions and return <code>1</code> for true<br>" 2066+"or <code>0</code> for false: <code>=</code>, <code>==</code>, <code>!=</code>, <code><></code>, <code><</code>, <code><=</code>, <code>></code>, <code>>=</code>.</p>"
2067+"<h4 id=\"asc6-packed-strings\">ASC6 packed strings</h4>" 2068+"<p><code>ASC6</code> stores text as consecutive 6-bit symbols. The supported source<br>" 2069+"character set is exactly ASCII <code>$20-$5F</code>:</p>" 2070+"<pre><code> space ! \" # $ % & ' ( ) * + , - . /<br>" 2071+" 0 1 2 3 4 5 6 7 8 9 : ; < = > ?<br>" 2072+" @ A B C D E F G H I J K L M N O<br>" 2073+" P Q R S T U V W X Y Z [ \ ] ^ _</code></pre>" 2074+"<p>The encoded symbol is <code>ASCII-$20</code>, so no lookup table is required. Four<br>" 2075+"characters occupy three bytes. A trailing partial byte is zero-padded in its<br>" 2076+"least-significant bits.</p>" 2077+"<p>Example:</p>" 2078+"<pre><code> TEXT ASC6 \"ABCD\"</code></pre>" 2079+"<p>Characters outside <code>$20-$5F</code> are assembly errors. In particular, lowercase<br>" 2080+"letters are not converted automatically.</p>" 2081+"<h4 id=\"compile-time-assertions\">Compile-time assertions</h4>" 2082+"<p><code>.ASSERT</code> is evaluated after assembly layout has converged and emits no bytes.<br>" 2083+"It follows the ca65-style form:</p>" 2084+"<pre><code> .ASSERT expression, error, \"message\"<br>" 2085+" .ASSERT expression, warning, \"message\"</code></pre>" 2086+"<p>For example, to protect a shared arena:</p>" 2087+"<pre><code> ARENA_START<br>" 2088+" BRIEFING ASC6 \"SYSTEM BRIEFING...\"<br>" 2089+" BRIEFING_END<br>" 2090+"<br>" 2091+" .ASSERT BRIEFING_END <= ARENA_START+$0700, error, \"briefing exceeds PAGE arena\"</code></pre>" 2092+"<p>An omitted severity defaults to <code>error</code>.</p>" 2093+"<h4 id=\"labels-and-identifiers\">Labels and Identifiers</h4>" 2094+"<p>Identifiers must begin with a letter [A-Za-z] and contain capital or lowercase letters, digits, and the underscore [A-Za-z0-9_]. Only the first 6 characters are significant.</p>" 2095+"<p>All identifiers, numbers, opcodes, and pragmas are case insensitive and translated to upper case. Identifiers must not be the same as valid opcodes.</p>" 2096+"<p>The special identifier \"*\" refers to the program counter (PC).</p>" 2097+"<h5 id=\"examples\">Examples</h5>" 2098+"<pre><code> ORG $C000 .... Set start address (PC) to C000.<br>" 2099+" LABEL1 LDA #4 .... Define LABEL1 with address of instruction LDA.<br>" 2100+" BNE LABEL2 .... Jump to address of label LABEL2.<br>" 2101+" STORE EQU $0810 .... Define STORE with value $0810.<br>" 2102+" HERE EQU * .... Define HERE with current address (PC).<br>" 2103+" HERE2 .... Define HERE2 with current address (PC).<br>" 2104+" LDA STORE .... Load LO-byte of STORE having value $10.</code></pre>" 2105+"<h4 id=\"pragmas\">Pragmas</h4>" 2106+"<pre><code> Pragmas start with a dot (.) and must be the only expression in a line:<br>" 2107+" .BYTE BB .... Insert 8 bit byte at current address into code.<br>" 2108+" .WORD HHLL .... Insert 16 bit word at current address into code.<br>" 2109+" .AT /ABC/ .... Insert Ascii string Terminated<br>" 2110+" .END .... End of source, stop assembly. (optional)</code></pre>" 2111+"<h4 id=\"comments\">Comments</h4>" 2112+"<pre><code> ; comment .... Any sequence of characters after a semicolon util end of the line is ignored.</code></pre>" 2113+"<h4 id=\"white-space\">White Space</h4>" 2114+"<pre><code> The assembler does not rely on any special formatting with following exclusion:</code></pre>" 2115+"<p>There must be white space between a label and a opcode and the opcode and any operands. Only one instruction per line is permitted.</p>" 2116+"<h4 id=\"code-example\">Code Example</h4>" 2117+"<h5 id=\"src\">Src:</h5>" 2118+"<pre><code> ORG $C000<br>" 2119+" LDX #0<br>" 2120+" Label1 TXA<br>" 2121+" STA $0400,X<br>" 2122+" LDA #1<br>" 2123+" STA $D800,X<br>" 2124+" INX<br>" 2125+" BNE Label1<br>" 2126+" RTS<br>" 2127+" .END</code></pre>" 2128+"<h5 id=\"listing\">Listing:</h5>" 2129+"<pre><code> *= $C000<br>" 2130+" C000 LDX #$00 A2 00<br>" 2131+" C002 Label1 TXA 8A<br>" 2132+" C003 STA $0400,X 9D 00 04<br>" 2133+" C006 LDA #$01 A9 01<br>" 2134+" C008 STA $D800,X 9D 00 D8<br>" 2135+" C00B INX E8<br>" 2136+" C00C BNE $C002 D0 F4<br>" 2137+" C00E RTS 60<br>" 2138+" C00F .END<br>" 2139+" done.</code></pre>" 2140+"<h5 id=\"object-code\">Object Code:</h5>" 2141+"<pre><code> A2 00 8A 9D 00 04 A9 01<br>" 2142+" 9D 00 D8 E8 D0 F4 60</code></pre>" 2143+"<h2 id=\"feature-wish-list\">FEATURE wish-list</h2><hr>" 2144+"<p>.DFB or .DB = <strong>D</strong>e<strong>F</strong>ine <strong>B</strong>yte <em>(borrowed from Merlin-16)</em></p>" 2145+"<h5 id=\"example\">Example:</h5>" 2146+"<pre><code> .DFB expression,expression,expression,...</code></pre>" 2147+"<p>.DS = <strong>D</strong>efine <strong>S</strong>torage <em>(borrowed from Merlin-16)</em></p>" 2148+"<h5 id=\"example-1\">Example:</h5>" 2149+"<pre><code> .DS expression1 ; zero out [expression1] bytes of memory<br>" 2150+" .DS expression1,expression2 ; put [expression2] in [expression1] bytes of memory<br>" 2151+" .DS \ ; zero out until next page of memory<br>" 2152+" .DS \,expression2 ; put [expression2] until next page of memory</code></pre>" 2153 2154_DOCS["PERIPHERALS"] = "<h2 id=\"peripheral-interfacing-explained\">PERIPHERAL interfacing Explained</h2><hr>" 2155+"<p>As we can ignore the electrical and signal layer of the peripheral interface, our only real concern is software compatibility.<br>" 2156+"We only need to mind about the memory map dedicated to I/O, called memory-mapped I/O, which is exactly 4K wide (between $C000 - $D000). Here is an enlarged map of this memory space :</p>" 2157+"<pre><code> <div style=width:800px><br>" 2158+" D000 ââââââââââââââââââââââââââââââââââââââ â² â²<br>" 2159+" â â â â<br>" 2160+" â Open for large ROM programs â 2048 Bytes HostROM â<br>" 2161+" â Activated by I/O strobe (pin 20) â â â<br>" 2162+" â â â â<br>" 2163+" C800 âââââââââââââââââââââââââââââââââââââ⤠ââ â<br>" 2164+" â â â² â<br>" 2165+" â RAM/ROM open for slot#7 â â â<br>" 2166+" â â 256 Bytes SlotROM â<br>" 2167+" C700 âââââââââââââââââââââââââââââââââââââ⤠ââ â<br>" 2168+" â â â² â<br>" 2169+" â RAM/ROM open for slot#6 â â â<br>" 2170+" â â 256 Bytes SlotROM â<br>" 2171+" C600 âââââââââââââââââââââââââââââââââââââ⤠ââ 4096 bytes<br>" 2172+" â â â² â<br>" 2173+" â RAM/ROM open for slot#5 â â â<br>" 2174+" â â 256 Bytes SlotROM â<br>" 2175+" C500 âââââââââââââââââââââââââââââââââââââ⤠ââ â<br>" 2176+" â â â² â<br>" 2177+" â RAM/ROM open for slot#4 â â â<br>" 2178+" â â 256 Bytes SlotROM â<br>" 2179+" C400 âââââââââââââââââââââââââââââââââââââ⤠ââ â<br>" 2180+" â â â² â<br>" 2181+" â RAM/ROM open for slot#3 â â â<br>" 2182+" â â 256 Bytes SlotROM â<br>" 2183+" C300 âââââââââââââââââââââââââââââââââââââ⤠ââ â<br>" 2184+" â â â² â<br>" 2185+" â RAM/ROM open for slot#2 â â â<br>" 2186+" â â 256 Bytes SlotROM â<br>" 2187+" C200 âââââââââââââââââââââââââââââââââââââ⤠ââ â<br>" 2188+" â â â² â<br>" 2189+" â RAM/ROM open for slot#1 â â â<br>" 2190+" â (No mem mapped for slot#0) â 256 Bytes SlotROM â<br>" 2191+" C100 ââââââ¬âââââââââââââââââââââââââââââââ⤠ââ â<br>" 2192+" C0F0 â I/O slot #7 ââ â â² â<br>" 2193+" C0E0 â I/O slot #6 ââ 16 Bytes â â â<br>" 2194+" C0D0 â I/O slot #5 â 128 Bytes SlotIO â<br>" 2195+" C0C0 â I/O slot #4 X 8 â â â<br>" 2196+" C0B0 â I/O slot #3 â â â<br>" 2197+" C0A0 â I/O slot #2 â â â<br>" 2198+" C090 â I/O slot #1 â â â<br>" 2199+" C080 â I/O slot #0 â â â<br>" 2200+" C080 ââââââ´âââââââââââââââââââââââââââââââ⤠ââ â<br>" 2201+" â Built-in I/O locations â â² â<br>" 2202+" â (keyboard,speaker,casette,game.. â 128 Bytes HostIO â<br>" 2203+" C000 ââââââââââââââââââââââââââââââââââââââ ââ â¼<br>" 2204+"<br>" 2205+"<br>" 2206+" </div></code></pre>" 2207+"<h2 id=\"the-16k-language-cards\">The 16K Language cards</h2><hr>" 2208+"<p>We will discuss two similar cards, with the same functions and same soft switches.</p>" 2209+"<ul>" 2210+"<li><a href=\"http://www.applelogic.org/files/LANGCARDMAN.pdf\">Apple Language Card</a> </li>" 2211+"<li><a href=\"https://mirrors.apple2.org.za/Apple%20II%20Documentation%20Project/Interface%20Cards/Language%20Cards/Microsoft%2016K%20RAM%20Card/Manuals/Microsoft%20RAMCard%20-%20Manual.pdf\">Microsoft Ramcard</a> </li>" 2212+"<li><a href=\"https://usermanual.wiki/Document/ae16kpocketrocketbrochure.1819483971.pdf\">Applied Engineering - Pocket Rocket RamCard</a></li>" 2213+"</ul>" 2214+"<p>The only difference between Apple vs Microsoft and others, is that the Apple card overrides KICKSTART ROM addresses F800-FFFF permanently, which only served as a ROM upgrade for old Apple II's. As we emulate the Apple II+, the Kickstart ROM on Apple Language card is bit-by-bit equal with the Kickstart ROM shipped with the Apple II+. All other functions are identical.</p>" 2215+"<p>
2215<a href=\"https://archive.org/details/Schematic_Diagram_of_the_Apple_II/page/n1/mode/2up\">Apple II+ motherboard schematics</a>" 2216+"TODO: check which chip has to be removed, and to which address locations this chip corresponds.</p>" 2217+"<p>Language Card Memory map</p>" 2218+"<pre><code> <div style=width:800px><br>" 2219+" FFFF ââââââââââââââââââ - - >âââââââââââââââââ - -â² â²<br>" 2220+" â KICKSTART ROM â â â â â<br>" 2221+" F800 âââââââââââââââââ⤠â RAMCARD RAM â 8K â<br>" 2222+" â APPLE ROM â â â â â<br>" 2223+" E000 â â - - >ââââââââââââââââ⤠⼠â 16K <br>" 2224+" â â â BANK A or B â â² â<br>" 2225+" â â â (switchable) â 2 X 4K â<br>" 2226+" D000 âââââââââââââââââ⤠- - >âââââââââââââââââ - -â¼ â¼ <br>" 2227+" â large ROM prog â â² <br>" 2228+" â (unused) â â¼ 2K<br>" 2229+" C800 ââââââââââââââââââ¤- - - - - - - - - - - - - - <br>" 2230+" â SLOT ROM/RAM â <br>" 2231+" â (unused) â <br>" 2232+" â â <br>" 2233+" C100 ââââ¬âââââââââââââ⤠<br>" 2234+" C0F0 â I/O slot #7 â<br>" 2235+" C0E0 â I/O slot #6 â<br>" 2236+" C0D0 â I/O slot #5 â<br>" 2237+" C0C0 â I/O slot #4 â<br>" 2238+" C0B0 â I/O slot #3 â<br>" 2239+" C0A0 â I/O slot #2 â<br>" 2240+" C090 â I/O slot #1 â âââââââââââââââââââ <br>" 2241+" C080 â I/O slot #0 ââââââ⤠8 soft switches â<br>" 2242+" âââââââââââââââ âââââââââââââââââââ <br>" 2243+"<br>" 2244+" </div></code></pre>" 2245+"<p><a href=\"https://www.youtube.com/watch?v=1KPIAoO1dTU\">video</a> <br>" 2246+"<a href=\"https://mirrors.apple2.org.za/Apple%20II%20Documentation%20Project/Interface%20Cards/Language%20Cards/Apple%20Language%20Card/Schematics/Apple%20Language%20Card%20-%20Schematics%20050-0019-01.pdf\">schematics</a> </p>" 2247+"<table>" 2248+"<thead>" 2249+"<tr>" 2250+"<th id=\"language_card_soft_switches\">Language card soft switches</th>" 2251+"</tr>" 2252+"</thead>" 2253+"<tbody>" 2254+"</tbody>" 2255+"</table>" 2256+"<table>" 2257+"<thead>" 2258+"<tr>" 2259+"<th id=\"address\" style=\"text-align:center;\">Address</th>" 2260+"<th id=\"rom\">ROM</th>" 2261+"<th id=\"ramcard\">RAMCARD</th>" 2262+"<th id=\"banka\">BANKA</th>" 2263+"<th id=\"bankb\">BANKB</th>" 2264+"<th id=\"description\">Description</th>" 2265+"</tr>" 2266+"</thead>" 2267+"<tbody>" 2268+"<tr>" 2269+"<td style=\"text-align:center;\">C080</td>" 2270+"<td></td>" 2271+"<td>R</td>" 2272+"<td></td>" 2273+"<td>R</td>" 2274+"<td>write-protect</td>" 2275+"</tr>" 2276+"<tr>" 2277+"<td style=\"text-align:center;\">*C081</td>" 2278+"<td>R</td>" 2279+"<td>W</td>" 2280+"<td></td>" 2281+"<td>W</td>" 2282+"<td>write (access 2x)</td>" 2283+"</tr>" 2284+"<tr>" 2285+"<td style=\"text-align:center;\">C082</td>" 2286+"<td>R</td>" 2287+"<td></td>" 2288+"<td></td>" 2289+"<td></td>" 2290+"<td>ROM-only</td>" 2291+"</tr>" 2292+"<tr>" 2293+"<td style=\"text-align:center;\">C083</td>" 2294+"<td></td>" 2295+"<td>R/W</td>" 2296+"<td></td>" 2297+"<td>R/W</td>" 2298+"<td>write (access 2x)</td>" 2299+"</tr>" 2300+"<tr>" 2301+"<td style=\"text-align:center;\">C088</td>" 2302+"<td></td>" 2303+"<td>R</td>" 2304+"<td>R</td>" 2305+"<td></td>" 2306+"<td>write-protect</td>" 2307+"</tr>" 2308+"<tr>" 2309+"<td style=\"text-align:center;\">C089</td>" 2310+"<td>R</td>" 2311+"<td>W</td>" 2312+"<td>W</td>" 2313+"<td></td>" 2314+"<td>write (access 2x)</td>" 2315+"</tr>" 2316+"<tr>" 2317+"<td style=\"text-align:center;\">C08A</td>" 2318+"<td>R</td>" 2319+"<td></td>" 2320+"<td></td>" 2321+"<td></td>" 2322+"<td>ROM-only</td>" 2323+"</tr>" 2324+"<tr>" 2325+"<td style=\"text-align:center;\">C08B</td>" 2326+"<td></td>" 2327+"<td>R/W</td>" 2328+"<td>R/W</td>" 2329+"<td></td>" 2330+"<td>write (access 2x)</td>" 2331+"</tr>" 2332+"</tbody>" 2333+"</table>" 2334+"<p>* default setting after cold boot</p>" 2335+"<h3 id=\"testing\">Testing</h3>" 2336+"<p><a href=\"http://www.ivanhogan.com/kfest/MemUtil/\">http://www.ivanhogan.com/kfest/MemUtil/</a></p>" 2337 2338_DOCS["PERIPHERALS"] = "<h2 id=\"peripheral-interfacing-explained\">PERIPHERAL interfacing Explained</h2><hr>" 2339+"<p>As we can ignore the electrical and signal layer of the peripheral interface, our only real concern is software compatibility.<br>" 2340+"We only need to mind about the memory map dedicated to I/O, called memory-mapped I/O, which is exactly 4K wide (between $C000 - $D000). Here is an enlarged map of this memory space :</p>" 2341+"<pre><code> <div style=width:800px><br>" 2342+" D000 ââââââââââââââââââââââââââââââââââââââ â² â²<br>" 2343+" â â â â<br>" 2344+" â Open for large ROM programs â 2048 Bytes HostROM â<br>" 2345+" â Activated by I/O strobe (pin 20) â â â<br>" 2346+" â â â â<br>" 2347+" C800 âââââââââââââââââââââââââââââââââââââ⤠ââ â<br>" 2348+" â â â² â<br>" 2349+" â RAM/ROM open for slot#7 â â â<br>" 2350+" â â 256 Bytes SlotROM â<br>" 2351+" C700 âââââââââââââââââââââââââââââââââââââ⤠ââ â<br>" 2352+" â â â² â<br>" 2353+" â RAM/ROM open for slot#6 â â â<br>" 2354+" â â 256 Bytes SlotROM â<br>" 2355+" C600 âââââââââââââââââââââââââââââââââââââ⤠ââ 4096 bytes<br>" 2356+" â â â² â<br>" 2357+" â RAM/ROM open for slot#5 â â â<br>" 2358+" â â 256 Bytes SlotROM â<br>" 2359+" C500 âââââââââââââââââââââââââââââââââââââ⤠ââ â<br>" 2360+" â â â² â<br>" 2361+" â RAM/ROM open for slot#4 â â â<br>" 2362+" â â 256 Bytes SlotROM â<br>" 2363+" C400 âââââââââââââââââââââââââââââââââââââ⤠ââ â<br>" 2364+" â â â² â<br>" 2365+" â RAM/ROM open for slot#3 â â â<br>" 2366+" â â 256 Bytes SlotROM â<br>" 2367+" C300 âââââââââââââââââââââââââââââââââââââ⤠ââ â<br>" 2368+" â â â² â<br>" 2369+" â RAM/ROM open for slot#2 â â â<br>" 2370+" â â 256 Bytes SlotROM â<br>" 2371+" C200 âââââââââââââââââââââââââââââââââââââ⤠ââ â<br>" 2372+" â â â² â<br>" 2373+" â RAM/ROM open for slot#1 â â â<br>" 2374+" â (No mem mapped for slot#0) â 256 Bytes SlotROM â<br>" 2375+" C100 ââââââ¬âââââââââââââââââââââââââââââââ⤠ââ â<br>" 2376+" C0F0 â I/O slot #7 ââ â â² â<br>" 2377+" C0E0 â I/O slot #6 ââ 16 Bytes â â â<br>" 2378+" C0D0 â I/O slot #5 â 128 Bytes SlotIO â<br>" 2379+" C0C0 â I/O slot #4 X 8 â â â<br>" 2380+" C0B0 â I/O slot #3 â â â<br>" 2381+" C0A0 â I/O slot #2 â â â<br>" 2382+" C090 â I/O slot #1 â â â<br>" 2383+" C080 â I/O slot #0 â â â<br>" 2384+" C080 ââââââ´âââââââââââââââââââââââââââââââ⤠ââ â<br>" 2385+" â Built-in I/O locations â â² â<br>" 2386+" â (keyboard,speaker,casette,game.. â 128 Bytes HostIO â<br>" 2387+" C000 ââââââââââââââââââââââââââââââââââââââ ââ â¼<br>" 2388+"<br>" 2389+"<br>" 2390+" </div></code></pre>" 2391+"<h2 id=\"the-16k-language-cards\">The 16K Language cards</h2><hr>" 2392+"<p>We will discuss two similar cards, with the same functions and same soft switches.</p>" 2393+"<ul>" 2394+"<li><a href=\"http://www.applelogic.org/files/LANGCARDMAN.pdf\">Apple Language Card</a> </li>" 2395+"<li><a href=\"https://mirrors.apple2.org.za/Apple%20II%20Documentation%20Project/Interface%20Cards/Language%20Cards/Microsoft%2016K%20RAM%20Card/Manuals/Microsoft%20RAMCard%20-%20Manual.pdf\">Microsoft Ramcard</a> </li>" 2396+"<li><a href=\"https://usermanual.wiki/Document/ae16kpocketrocketbrochure.1819483971.pdf\">Applied Engineering - Pocket Rocket RamCard</a></li>" 2397+"</ul>" 2398+"<p>The only difference between Apple vs Microsoft and others, is that the Apple card overrides KICKSTART ROM addresses F800-FFFF permanently, which only served as a ROM upgrade for old Apple II's. As we emulate the Apple II+, the Kickstart ROM on Apple Language card is bit-by-bit equal with the Kickstart ROM shipped with the Apple II+. All other functions are identical.</p>" 2399+"<p>
2399<a href=\"https://archive.org/details/Schematic_Diagram_of_the_Apple_II/page/n1/mode/2up\">Apple II+ motherboard schematics</a>" 2400+"TODO: check which chip has to be removed, and to which address locations this chip corresponds.</p>" 2401+"<p>Language Card Memory map</p>" 2402+"<pre><code> <div style=width:800px><br>" 2403+" FFFF ââââââââââââââââââ - - >âââââââââââââââââ - -â² â²<br>" 2404+" â KICKSTART ROM â â â â â<br>" 2405+" F800 âââââââââââââââââ⤠â RAMCARD RAM â 8K â<br>" 2406+" â APPLE ROM â â â â â<br>" 2407+" E000 â â - - >ââââââââââââââââ⤠⼠â 16K <br>" 2408+" â â â BANK A or B â â² â<br>" 2409+" â â â (switchable) â 2 X 4K â<br>" 2410+" D000 âââââââââââââââââ⤠- - >âââââââââââââââââ - -â¼ â¼ <br>" 2411+" â large ROM prog â â² <br>" 2412+" â (unused) â â¼ 2K<br>" 2413+" C800 ââââââââââââââââââ¤- - - - - - - - - - - - - - <br>" 2414+" â SLOT ROM/RAM â <br>" 2415+" â (unused) â <br>" 2416+" â â <br>" 2417+" C100 ââââ¬âââââââââââââ⤠<br>" 2418+" C0F0 â I/O slot #7 â<br>" 2419+" C0E0 â I/O slot #6 â<br>" 2420+" C0D0 â I/O slot #5 â<br>" 2421+" C0C0 â I/O slot #4 â<br>" 2422+" C0B0 â I/O slot #3 â<br>" 2423+" C0A0 â I/O slot #2 â<br>" 2424+" C090 â I/O slot #1 â âââââââââââââââââââ <br>" 2425+" C080 â I/O slot #0 ââââââ⤠8 soft switches â<br>" 2426+" âââââââââââââââ âââââââââââââââââââ <br>" 2427+"<br>" 2428+" </div></code></pre>" 2429+"<p><a href=\"https://www.youtube.com/watch?v=1KPIAoO1dTU\">video</a> <br>" 2430+"<a href=\"https://mirrors.apple2.org.za/Apple%20II%20Documentation%20Project/Interface%20Cards/Language%20Cards/Apple%20Language%20Card/Schematics/Apple%20Language%20Card%20-%20Schematics%20050-0019-01.pdf\">schematics</a> </p>" 2431+"<table>" 2432+"<thead>" 2433+"<tr>" 2434+"<th id=\"language_card_soft_switches\">Language card soft switches</th>" 2435+"</tr>" 2436+"</thead>" 2437+"<tbody>" 2438+"</tbody>" 2439+"</table>" 2440+"<table>" 2441+"<thead>" 2442+"<tr>" 2443+"<th id=\"address\" style=\"text-align:center;\">Address</th>" 2444+"<th id=\"rom\">ROM</th>" 2445+"<th id=\"ramcard\">RAMCARD</th>" 2446+"<th id=\"banka\">BANKA</th>" 2447+"<th id=\"bankb\">BANKB</th>" 2448+"<th id=\"description\">Description</th>" 2449+"</tr>" 2450+"</thead>" 2451+"<tbody>" 2452+"<tr>" 2453+"<td style=\"text-align:center;\">C080</td>" 2454+"<td></td>" 2455+"<td>R</td>" 2456+"<td></td>" 2457+"<td>R</td>" 2458+"<td>write-protect</td>" 2459+"</tr>" 2460+"<tr>" 2461+"<td style=\"text-align:center;\">*C081</td>" 2462+"<td>R</td>" 2463+"<td>W</td>" 2464+"<td></td>" 2465+"<td>W</td>" 2466+"<td>write (access 2x)</td>" 2467+"</tr>" 2468+"<tr>" 2469+"<td style=\"text-align:center;\">C082</td>" 2470+"<td>R</td>" 2471+"<td></td>" 2472+"<td></td>" 2473+"<td></td>" 2474+"<td>ROM-only</td>" 2475+"</tr>" 2476+"<tr>" 2477+"<td style=\"text-align:center;\">C083</td>" 2478+"<td></td>" 2479+"<td>R/W</td>" 2480+"<td></td>" 2481+"<td>R/W</td>" 2482+"<td>write (access 2x)</td>" 2483+"</tr>" 2484+"<tr>" 2485+"<td style=\"text-align:center;\">C088</td>" 2486+"<td></td>" 2487+"<td>R</td>" 2488+"<td>R</td>" 2489+"<td></td>" 2490+"<td>write-protect</td>" 2491+"</tr>" 2492+"<tr>" 2493+"<td style=\"text-align:center;\">C089</td>" 2494+"<td>R</td>" 2495+"<td>W</td>" 2496+"<td>W</td>" 2497+"<td></td>" 2498+"<td>write (access 2x)</td>" 2499+"</tr>" 2500+"<tr>" 2501+"<td style=\"text-align:center;\">C08A</td>" 2502+"<td>R</td>" 2503+"<td></td>" 2504+"<td></td>" 2505+"<td></td>" 2506+"<td>ROM-only</td>" 2507+"</tr>" 2508+"<tr>" 2509+"<td style=\"text-align:center;\">C08B</td>" 2510+"<td></td>" 2511+"<td>R/W</td>" 2512+"<td>R/W</td>" 2513+"<td></td>" 2514+"<td>write (access 2x)</td>" 2515+"</tr>" 2516+"</tbody>" 2517+"</table>" 2518+"<p>* default setting after cold boot</p>" 2519+"<h3 id=\"testing\">Testing</h3>" 2520+"<p><a href=\"http://www.ivanhogan.com/kfest/MemUtil/\">http://www.ivanhogan.com/kfest/MemUtil/</a></p>" 2521 2522_DOCS["EMULATOR"] = "<h2 id=\"emulator-user-instructions\">EMULATOR User Instructions</h2><hr>" 2523+"<p><img src=\"https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/appleIIplus_bck_650_v3.png?raw=true\" width=35% align=\"left\" /></p>" 2524+"<p>While the end-user experience with this emulator hardly differs from the real hardware, there are some essential adaptations, mostly to accomodate contemporary user expecations, like copy-paste. There is no point in creating an emulator that is completely offline like it was mostly the case in it's pre-internet era. </p>" 2525+"<p>This small guide is leading you through the usability features of the emulator compared to the bare metal. For all the other features, there is a huge body of <a href=\"https://mirrors.apple2.org.za/Apple%20II%20Documentation%20Project/Books/\">documentation</a> available, and for more specific details on the global architecture of this very emulator, please check out the following document: <a href=\"EMULATOR_ARCHITECTURE.md\">EMULATOR_ARCHITECTURE.md</a></p>" 2526+"<p>All the special functions and settings can be accessed on the right side the tab menu.</p>" 2527+"<h3 id=\"img-srcresdoc_emu_tools_menupngrawtrue-width2--alignleft-tools\"><img src=\"https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/doc_emu_tools_menu.png?raw=true\" width=2% align=\"left\"/> TOOLS</h3>" 2528+"<p><strong>Pasteboard</strong>" 2529+"<br>" 2530+"<img src=\"https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/doc_emu_pasteboard_pane.png?raw=true\" width=25% align=\"left\"/>" 2531+"<br></p>" 2532+"<ul>" 2533+"<li><strong>Paste</strong> any text into the emulator. This function senses the keyboard strobe address which reveals exactly when the Apple II hardware is ready to take a character from the keyboard, assuring the fastest data transfer rate.</li>" 2534+"<li><strong>txtCap</strong> to capture text screen #1 in the pasteboard. This is actually a memory dump between $400-$5FF, but bytes are reordered logically to overcome the Apple II's chip saving design.</li>" 2535+"<li><strong>MemCap</strong> to bulk capture any byte stream between two addresses.</li>" 2536+"<li><strong>Clear</strong> as the text area can be used in both directions (import/export), it is important to clear it quickly.</li>" 2537+"</ul>" 2538+"<p><strong>CPU & Sound enablement</strong>" 2539+"<br>" 2540+"<img src=\"https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/doc_emu_CPU_pane.png?raw=true\" width=7.5% align=\"left\"/>" 2541+"<br></p>" 2542+"<ul>" 2543+"<li><strong>Sound</strong> Speaker sound is turned off by default as browsers tend to reject unsolicited website sound.</li>" 2544+"<li><strong>Run/Pause</strong> Runs or pauses the CPU</li>" 2545+"<li><strong>Reset</strong> = warm boot</li>" 2546+"<li><strong>Restart</strong> = cold boot</li>" 2547+"</ul>" 2548+"<p><strong>Disk</strong>" 2549+"<br>" 2550+"<img src=\"https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/doc_emu_disk_pane.png?raw=true\" width=35% align=\"left\"/>" 2551+"<br><br>" 2552+"The disk pane allows loading and ejecting up to two floppy disks in .DSK file format. When writing or updating Apple II files on any of the given disk image, a new disk image can be saved including all the changes made so far. As for now, the save function only supports saving .NIB format files.</p>" 2553+"<h3 id=\"img-srcresdoc_emu_settings_menupngrawtrue-width2--alignleft-sett
2553ings\"><img src=\"https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/doc_emu_settings_menu.png?raw=true\" width=2% align=\"left\"/> SETTINGS</h3>" 2554+"<p><strong>CPU speed settings</strong>" 2555+"<br>" 2556+"<img src=\"https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/doc_emu_system_pane.png?raw=true\" width=10% align=\"left\"/>" 2557+"CPU speed can be modified in real-time by dragging the slider bar between 0% to 200%. While it looks like a simple parameter, there are parallel threats that need to remain in sync according to the needs. The virtual device for sound production needs to adapt it's sample rate according to the CPU clock rate. At every slider update, the emulator thread is therefore effectively notifying the sound driver for this reason. Also for graphics, when emulating graphics by means of the GPU, we need to mind keeping a refresh rate of approximately 25 frames per second, except While going down to a 10% CPU rate, we can but also must significantly slow down screen updates to free-up the emulator load for other important purposes like real-time CPU tracing, debugging and monitoring.</p>" 2558+"<p>The debugger can be enabled by sliding the bar to 0% after which the debug icon appears. Just mind clicking this icon to start debugging.</p>" 2559+"<p><strong>Screen settings</strong></p>" 2560+"<p><strong>color mode</strong>" 2561+"<br>" 2562+"<img src=\"https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/doc_emu_system_pane.png?raw=true\" width=10% align=\"left\"/> On the emulator's system pane, the colour pallet button allows cycling through colour modes (colour, black & white, green, amber). This button is handy wherever the Apple II colour encoding becomes disturbing (e.g. font display in HGR graphics). When hoovering over the pallette icon, a tooltip will indicate the actual colour mode in use. Please find coding documentation about \"color mode\" here <a href=\"EMULATOR_DEV.md\">EMULATOR_DEV.md</a></p>" 2563+"<p><strong>Keyboard features</strong></p>" 2564+"<pre><code> Text flow diagram<br>" 2565+" ââââââââââââââââââââââââââââââââââââ<br>" 2566+" âASM srcââHost keyboardââPasteboardâ<br>" 2567+" ââââââââ¬âââââ¬ââââââââââââââ¬âââââââââ<br>" 2568+" â â âââââââââââ<br>" 2569+" â â â<br>" 2570+" â¡ â¡ â¡ UTF8<br>" 2571+" â â â<br>" 2572+" ââââ¼âââââ¼ââââ¼ââ ââââââââââ<br>" 2573+" â UTF8 to A2 â âVirtual â<br>" 2574+" â mapping â âkeyboardâ<br>" 2575+" ââââ¬âââââ¬ââââââ âââââ¬âââââ<br>" 2576+" â â âââââââââ<br>" 2577+" â â â<br>" 2578+" â â â A2 character byte<br>" 2579+" â â â<br>" 2580+" ââââââââ¼ ââââ¼ âââ¼ âââ ââââââââââ<br>" 2581+" âAssemblerââEmulatorââââââââ¶char ROMâ<br>" 2582+" âââââââââ¬âââââââââ¥âââ âââââââ¬âââ<br>" 2583+" bytecodeâââââ â â<br>" 2584+" âââââââ¨ââ â<br>" 2585+" âdisplayâ âââââââââââ¼âââ<br>" 2586+" âdriver âââââ¤glyph bitmapâ<br>" 2587+" âââââââââ ââââââââââââââ</code></pre>" 2588+"<p><img src=\"https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/appleIIplus_kbd_650.png?raw=true\" width=40% align=\"left\"/> </p>" 2589+"<p><strong>physical keyboard</strong> and <strong>pop-up virtual keyboard</strong> can be used interchangably.<br>" 2590+"<strong>physical keyboard</strong> activates when clicking inside the area of the emulated screen.<br>" 2591+"<strong>virtual keyboard</strong> activates when hovering over the area of the virtual keyboard.<br>" 2592+"<strong>virtual keyboard</strong> by default is configured for mouse-driven host computers where SHIFT, CTRL and REPT keys toggle on/off by means of 2 mou
2592se clicks. <br>" 2593+"<strong>white power light</strong> on virtual keyboard acts as a power button, which causes a cold-boot. (Instead of flip-switch located below the keyboard on a real Apple II) </p>" 2594+"<ul>" 2595+"<li><strong>insert disk</strong> icon allows loading any disk file found on the internet (.do, .dsk), after, perform a cold boot <br>" 2596+"<em>note: mind that most Apple II disks do not self-boot, keeping a bootable disk image at hand reach is still required.</em> </li>" 2597+"</ul>" 2598+"<p><strong>The 1MHz trick</strong> <br>" 2599+"JavaScript does not provide 1µs timing precision, but we have a workaround. The setInterval() function located in EMU_apple2main.js, which drives the main loop of our emulator, starts a new sequence every 100ms. Instead of cycling one time through the CPU emulator every 1µs, we cycle 100K times every 0.1s or 100ms. By this trick, we achieve exactly the same performance as a real Apple II at 1MHz (100K cycles/0.1). Just, all 100K cycles are far from equally spread accross this 100ms loop. Most CPU's nowadays, effortlessly execute all 100K cycles in less than 5ms, which all sounds good, until one needs to emulate 'sound'. Below diagram explains the 1MHz trick visually :</p>" 2600+"<pre><code> <div style=width:800px><br>" 2601+"<br>" 2602+" : 100ms : <br>" 2603+" ââââââââââââââââââââââââââââââââââââââââââââââââââ... â<br>" 2604+" setInterval(appleInterval(),100) â ââ â<br>" 2605+" (outer loop) âââ ââ â<br>" 2606+" : : â<br>" 2607+" : : â <br>" 2608+" :<5ms :<5ms â> EMULATED<br>" 2609+" :ââââ⺠:âââââº<br>" 2610+" ââ¬â¬â¬â¬â ââ¬â¬â¬â¬â â CLOCK<br>" 2611+" ââââââ ââââââ â <br>" 2612+" apple2plus.cycle(10000) âââ100Kââââââââââââââââââââââââââââââââââââââââ100Kââ... â<br>" 2613+" (inner loop) :cycles :cycles â<br>" 2614+" : :<br>" 2615+" : 1µs :<br>" 2616+" :/ :<br>" 2617+" ââââââââââââââââââââââââââââââââââââââââââââââââââ â<br>" 2618+" real Apple II at 1MHz ââââââââââââââââââââââââââââââââââââââââââââââââââââ... â> HARDWARE<br>" 2619+" : 100K cycles : â CLOCK<br>" 2620+" </div></code></pre>" 2621+"<p><img src=\"http://www.plantuml.com/plantuml/png/ZOunJyCm48Lt_ugdJ21rE0yPs48g445YwifYdAjguTYMVMaGYFzEI8iQcDZkdhxtz3L5J9PnyChwQ5y1L7V3w8t4ZC6u01zZUWwFvcXsDhiasB5qGJWVZR-whc0AjeJ9oG69iuizD17Iw0lZfaRSxmiBIDaOh2lyTtvoeO_JQKQh75_68ci75mBdHM9XsXM3Kt8HpsmyRbFoZAw34UYdX_S5klybM9_rw6AdMXncZbIhbqDlvgmXjTLm1HM_iVrHLUsIVT16VyvCVVw_UKt_QMXQTLJ3eHy7_mK0\" alt=\"plantuml\" /></p>" 2622+"<p><strong>Deceivingly simple sound emulation</strong> <br>" 2623+"The ability of the Apple II to produce a soft-switch-activated real-time 'click', transitioning the speaker voltage from 0V to 1V and back turned out tricky to mimic. However simple sound production was designed on the Apple II, since 1997, JavaScript maintained <strong>1ms</strong> as the <strong>highest achievable timing accuracy</strong>. While the 6502 CPU was clocked at approximately 1MHz, emulating a CPU-driven speaker theoretically needs a 1000-fold more accuracy than JavaScript can provide today. In other words, JavaScript cannot implement any timer-driven sound above it's nyquist maximum of 500Hz, while a typical Ap
2623ple II Beep sound is 1KHz.</p>" 2624+"<p>W3C recently started to worry about this limitation by proposing a new spec called <a href=\"https://w3c.github.io/hr-time/\">\"High Resolution Time\"</a> or <a href=\"https://w3c.github.io/hr-time/\">hr-time</a>, but because of alleged malicious capability like [CACHE-ATTACKS] and [SPECTRE], W3C recommends to purposefully mess-up it's timers accuracy by reducing resolution, adding jitter, or by any other means that probably never will provide us anything near to 1µs clock accuracy.</p>" 2625+"<p>Since we may never reach this accuracy, we have to think about how hard we need 1µs clock accuracy for sound emulation after all. We can toggle the Apple II speaker on and off by reading the $C030 address location as often as we want. But, knowing that frequencies above 20000Hz remain inaudible, we should mind about toggling the speaker only 40000 times per second = once every 25µs. The \"coarsen time\" add-on proposed by W3C will by default deliver 100µs accuracy, but by setting the flag crossOriginIsolatedCapability = true, it may deliver 5µs. In practice, for real-time sound emulation, we only need a maximum of 25µs timer accuracy, which <a href=\"https://w3c.github.io/hr-time/\">hr-time</a> will likely provide. </p>" 2626+"<p>The next best method for sound emulation is the scheduling/buffering approach; Chromium authors developed in 2017 a modern thread model for JavaScript audio - called <a href=\"https://retroapplejs.github.io/tools/AudioWorkletJS.html\">AudioWorklet</a> - that became a cross-browser standard by now. Real-time audio remains impossible, but a buffering method using AudioWorklets provides reasonable jitter stability, and reasonably short buffer delays.</p>" 2627+"<p>Sound buffering was conveniently aligned to the existing emulator intervals of 100ms or 10/second, which unfortunately comes with the same amount of delay. While during one emulator interval, the CPU performs about 100K clock cycles, we can rationalise emulator load and memory by sampling the speakers I/O address $C030 only once in a while. In our previous findings, 25µs accuracy would be largely sufficient, and through experimentation, even 45µs turned out sufficient. The AudioWorklet (for now) imposes a fixed-size audio buffer block size of 128 samples. Finding the closest integer amount of blocks at an integer sample rate, that would fit in 100ms required some additional experimentation expressed in a table right here <a href=\"https://retroapplejs.github.io/tools/AudioWorkletJS.html\">AudioWorklet</a>. Finally, buffering 17 blocks * 128 samples = 2176 samples at a sample rate of 21760 samples/s or 0.0217 MHz takes precisely 100ms to complete. As a best guess, sampling the I/O address every 1MHz / 0.02176 MHz = 45.955 times; rounded up to 46 CPU clocks per sample, we achieve 99.90% sample accuracy. </p>" 2628+"<h2 id=\"appendix\">Appendix</h2><hr>" 2629+"<h3 id=\"memory-map\">Memory map</h3>" 2630+"<pre><code> <div style=width:800px><br>" 2631+" FFFF ââââââââââââââââââââââââââââââââââââââ â² <br>" 2632+" â Autostart ROM â 2K â<br>" 2633+" â â â<br>" 2634+" F800 âââââââââââââââââââââââââââââââââââââ⤠â 12K<br>" 2635+" â â â ROM<br>" 2636+" â â â <br>" 2637+" â Applesoft ROM â 10K â<br>" 2638+" â â â<br>" 2639+" â â â¼<br>" 2640+" D000 âââââââââââââââââââââââââââââââââââââ⤠<br>" 2641+" â I/O ROM/RAM â 2K â²<br>" 2642+" â â â<br>" 2643+" C800 âââââââââââââââââââââââââââââââââââââ⤠â 4K<br>" 2644+" â I/O Ports â 2K â I/O<br>" 2645+" â â â¼<br>" 2646+" C000 âââââââââââââââââââââââââââââââââââââ⤠<br>" 2647+" â â â² <br>" 2648+" â â â<br>" 2649+" â â â <br>" 2650+" â Free â 24K â<br>" 2651+" â â â<br>" 2652+" â â â<br>" 2653+" â â â<br>" 2654+" 6000 âââââââââââââââââââââââââââââââââââââ⤠â<br>" 2655+" â â â <br>" 2656+" â Hi-Res 2 â 8K â<br>" 2657+" â â â<br>" 2658+" â â â<br>" 2659+" 4000 âââââââââââââââââââââââââââââââââââââ⤠â 48K<br>" 2660+" â â â RAM <br>" 2661+" â Hi-Res 1 â 8K â<br>" 2662+" â â â <br>" 2663+" â â â<br>" 2664+" 2000 âââââââââââââââââââââââââââââââââââââ⤠â<br>" 2665+" â â â <br>" 2666+" â Free â 5K â<br>" 2667+" â â â<br>" 2668+" 0C00 âââââââââââââââââââââââââââââââââââââ⤠â<br>" 2669+" â Text & Lo-res graphics 2 â 1K â<br>" 2670+" 0800 âââââââââââââââââââââââââââââââââââââ⤠â<br>" 2671+" â Text & Lo-res graphics 1 â 1K â<br>" 2672+" 0400 âââââââââââââââââââââââââââââââââââââ⤠â<br>" 2673+" â System RAM (zero page, stack..) â 1K â<br>" 2674+" 0000 ââââââââââââââââââââââââââââââââââââââ â¼</code></pre>" 2675+"<h3 id=\"hard-wired-keyboard-functions\">Hard-wired keyboard functions</h3>" 2676+"<p><img src=\"https://github.com/RetroAppleJS/RetroAppleJS.github.io/raw/main/res/appleIIplus_kbd_650.png?raw=true\" width=40% align=\"right\"/> </p>" 2677+"<p><strong>CTRL</strong> and <strong>SHIFT</strong> keys generate no codes by themselves, but only after the codes produced by other keys.</p>" 2678+"<p>The <strong>REPT</strong> key is pressed alone produces a duplicate of the last code that was generated.<br>" 2679+"If you press and hold down the <strong>REPT</strong> key while you are holding down a character key, it will act as if you are pressing that key repeatedly at a rate of 10 pressess each second. This repetition will cease when you release either the character key or <strong>REPT</strong>.</p>" 2680+"<p>The <strong>POWER</strong> light at the lower left-hand corner is an indicator lamp to show when the power to the Apple is on.<br>" 2681+"As the physical power switch is located below the keyboard, for convenience, we turned the <strong>POWER</strong> light into a cold boot button.</p>" 2682+"<table>" 2683+"<thead>" 2684+"<tr>" 2685+"<th id=\"keys_and_their_associated_ascii_codes\">Keys and their associated ASCII codes</th>" 2686+"</tr>" 2687+"</thead>" 2688+"<tbody>" 2689+"</tbody>" 2690+"</table>" 2691+"<table>" 2692+"<thead>" 2693+"<tr>" 2694+"<th id=\"key\" style=\"text-align:center;\">Key</th>" 2695+"<th id=\"alone\">Alone</th>" 2696+"<th id=\"ctrl\">CTRL</th>" 2697+"<th id=\"shift\">SHIFT</th>" 2698+"<th id=\"both\">Both</th>" 2699+"<th id=\"\"></th>" 2700+"<th id=\"key\" style=\"text-align:center;\">Key</th>" 2701+"<th id=\"alone\">Alone</th>" 2702+"<th id=\"ctrl\">CTRL</th>" 2703+"<th id=\"shift\">SHIFT</th>" 2704+"<th id=\"both\">Both</th>" 2705+"</tr>" 2706+"</thead>" 2707+"<tbody>" 2708+"<tr>" 2709+"<td style=\"text-align:center;\">space</td>" 2710+"<td>$A0</td>" 2711+"<td>$A0</td>" 2712+"<td>$A0</td>" 2713+"<td>$A0</td>" 2714+"<td></td>" 2715+"<td style=\"text-align:center;\">RETURN</td>" 2716+"<td>$8D</td>" 2717+"<td>$8D</td>" 2718+"<td>$8D</td>" 2719+"<td>$8D</td>" 2720+"</tr>" 2721+"<tr>" 2722+"<td style=\"text-align:center;\">0</td>" 2723+"<td>$B0</td>" 2724+"<td>$B0</td>" 2725+"<td>$B0</td>" 2726+"<td>$B0</td>" 2727+"<td></td>" 2728+"<td style=\"text-align:center;\">G</td>" 2729+"<td>$C7</td>" 2730+"<td>$87</td>" 2731+"<td>$C7</td>" 2732+"<td>$87</td>" 2733+"</tr>" 2734+"<tr>" 2735+"<td style=\"text-align:center;\">1!</td>" 2736+"<td>$B1</td>" 2737+"<td>$B1</td>" 2738+"<td>$A1</td>" 2739+"<td>$A1</td>" 2740+"<td></td>" 2741+"<td style=\"text-align:center;\">H</td>" 2742+"<td>$C8</td>" 2743+"<td>$88</td>" 2744+"<td>$C8</td>" 2745+"<td>$88</td>" 2746+"</tr>" 2747+"<tr>" 2748+"<td style=\"text-align:center;\">2\"</td>" 2749+"<td>$B2</td>" 2750+"<td>$B2</td>" 2751+"<td>$A2</td>" 2752+"<td>$A2</td>" 2753+"<td></td>" 2754+"<td style=\"text-align:center;\">I</td>" 2755+"<td>$C9</td>" 2756+"<td>$89</td>" 2757+"<td>$C9</td>" 2758+"<td>$89</td>" 2759+"</tr>" 2760+"<tr>" 2761+"<td style=\"text-align:center;\">3#</td>" 2762+"<td>$B3</td>" 2763+"<td>$B3</td>" 2764+"<td>$A3</td>" 2765+"<td>$A3</td>" 2766+"<td></td>" 2767+"<td style=\"text-align:center;\">J</td>" 2768+"<td>$CA</td>" 2769+"<td>$8A</td>" 2770+"<td>$CA</td>" 2771+"<td>$8A</td>" 2772+"</tr>" 2773+"<tr>" 2774+"<td style=\"text-align:center;\">4$</td>" 2775+"<td>$B4</td>" 2776+"<td>$B4</td>" 2777+"<td>$A4</td>" 2778+"<td>$A4</td>" 2779+"<td></td>" 2780+"<td style=\"text-align:center;\">K</td>" 2781+"<td>$CB</td>" 2782+"<td>$8B</td>" 2783+"<td>$CB</td>" 2784+"<td>$8B</td>" 2785+"</tr>" 2786+"<tr>" 2787+"<td style=\"text-align:center;\">5%</td>" 2788+"<td>$B5</td>" 2789+"<td>$B5</td>" 2790+"<td>$A5</td>" 2791+"<td>$A5</td>" 2792+"<td></td>" 2793+"<td style=\"text-align:center;\">L</td>" 2794+"<td>$CC</td>" 2795+"<td>$8C</td>" 2796+"<td>$CC</td>" 2797+"<td>$8C</td>" 2798+"</tr>" 2799+"<tr>" 2800+"<td style=\"text-align:center;\">6&</td>" 2801+"<td>$B6</td>" 2802+"<td>$B6</td>" 2803+"<td>$A6</td>" 2804+"<td>$A6</td>" 2805+"<td></td>" 2806+"<td style=\"text-align:center;\">M</td>" 2807+"<td>$CD</td>" 2808+"<td>$8D</td>" 2809+"<td>$DD</td>" 2810+"<td>$9D</td>" 2811+"</tr>" 2812+"<tr>" 2813+"<td style=\"text-align:center;\">7'</td>" 2814+"<td>$B7</td>" 2815+"<td>$B7</td>" 2816+"<td>$A7</td>" 2817+"<td>$A7</td>" 2818+"<td></td>" 2819+"<td style=\"text-align:center;\">N^</td>" 2820+"<td>$CE</td>" 2821+"<td>$8E</td>" 2822+"<td>$DE</td>" 2823+"<td>$9E</td>" 2824+"</tr>" 2825+"<tr>" 2826+"<td style=\"text-align:center;\">8(</td>" 2827+"<td>$B8</td>" 2828+"<td>$B8</td>" 2829+"<td>$A8</td>" 2830+"<td>$A8</td>" 2831+"<td></td>" 2832+"<td style=\"text-align:center;\">O</td>" 2833+"<td>$CF</td>" 2834+"<td>$8F</td>" 2835+"<td>$CF</td>" 2836+"<td>$8F</td>" 2837+"</tr>" 2838+"<tr>" 2839+"<td style=\"text-align:center;\">9)</td>" 2840+"<td>$B9</td>" 2841+"<td>$B9</td>" 2842+"<td>$A9</td>" 2843+"<td>$A9</td>" 2844+"<td></td>" 2845+"<td style=\"text-align:center;\">P@</td>" 2846+"<td>$D0</td>" 2847+"<td>$90</td>" 2848+"<td>$C0</td>" 2849+"<td>$80</td>" 2850+"</tr>" 2851+"<tr>" 2852+"<td style=\"text-align:center;\">:*</td>" 2853+"<td>$BA</td>" 2854+"<td>$BA</td>" 2855+"<td>$AA</td>" 2856+"<td>$AA</td>" 2857+"<td></td>" 2858+"<td style=\"text-align:center;\">Q</td>" 2859+"<td>$D1</td>" 2860+"<td>$91</td>" 2861+"<td>$D1</td>" 2862+"<td>$91</td>" 2863+"</tr>" 2864+"<tr>" 2865+"<td style=\"text-align:center;\">;+</td>" 2866+"<td>$BB</td>" 2867+"<td>$BB</td>" 2868+"<td>$AB</td>" 2869+"<td>$AB</td>" 2870+"<td></td>" 2871+"<td style=\"text-align:center;\">R</td>" 2872+"<td>$D2</td>" 2873+"<td>$92</td>" 2874+"<td>$D2</td>" 2875+"<td>$92</td>" 2876+"</tr>" 2877+"<tr>" 2878+"<td style=\"text-align:center;\">,<</td>" 2879+"<td>$AC</td>" 2880+"<td>$AC</td>" 2881+"<td>$BC</td>" 2882+"<td>$BC</td>" 2883+"<td></td>" 2884+"<td style=\"text-align:center;\">S</td>" 2885+"<td>$D3</td>" 2886+"<td>$93</td>" 2887+"<td>$D3</td>" 2888+"<td>$93</td>" 2889+"</tr>" 2890+"<tr>" 2891+"<td style=\"text-align:center;\">-=</td>" 2892+"<td>$AD</td>" 2893+"<td>$AD</td>" 2894+"<td>$BD</td>" 2895+"<td>$BD</td>" 2896+"<td></td>" 2897+"<td style=\"text-align:center;\">T</td>" 2898+"<td>$D4</td>" 2899+"<td>$94</td>" 2900+"<td>$D4</td>" 2901+"<td>$94</td>" 2902+"</tr>" 2903+"<tr>" 2904+"<td style=\"text-align:center;\">.></td>" 2905+"<td>$AE</td>" 2906+"<td>$AE</td>" 2907+"<td>$BE</td>" 2908+"<td>$BE</td>" 2909+"<td></td>" 2910+"<td style=\"text-align:center;\">U</td>" 2911+"<td>$D5</td>" 2912+"<td>$95</td>" 2913+"<td>$D5</td>" 2914+"<td>$95</td>" 2915+"</tr>" 2916+"<tr>" 2917+"<td style=\"text-align:center;\">/?</td>" 2918+"<td>$AF</td>" 2919+"<td>$AF</td>" 2920+"<td>$BF</td>" 2921+"<td>$BF</td>" 2922+"<td></td>" 2923+"<td style=\"text-align:center;\">V</td>" 2924+"<td>$D6</td>" 2925+"<td>$96</td>" 2926+"<td>$D6</td>" 2927+"<td>$96</td>" 2928+"</tr>" 2929+"<tr>" 2930+"<td style=\"text-align:center;\">A</td>" 2931+"<td>$C1</td>" 2932+"<td>$81</td>" 2933+"<td>$C1</td>" 2934+"<td>$81</td>" 2935+"<td></td>" 2936+"<td style=\"text-align:center;\">W</td>" 2937+"<td>$D7</td>" 2938+"<td>$97</td>" 2939+"<td>$D7</td>" 2940+"<td>$97</td>" 2941+"</tr>" 2942+"<tr>" 2943+"<td style=\"text-align:center;\">B</td>" 2944+"<td>$C2</td>" 2945+"<td>$82</td>" 2946+"<td>$C2</td>" 2947+"<td>$82</td>" 2948+"<td></td>" 2949+"<td style=\"text-align:center;\">X</td>" 2950+"<td>$D8</td>" 2951+"<td>$98</td>" 2952+"<td>$D8</td>" 2953+"<td>$98</td>" 2954+"</tr>" 2955+"<tr>" 2956+"<td style=\"text-align:center;\">C</td>" 2957+"<td>$C3</td>" 2958+"<td>$83</td>" 2959+"<td>$C3</td>" 2960+"<td>$83</td>" 2961+"<td></td>" 2962+"<td style=\"text-align:center;\">Y</td>" 2963+"<td>$D9</td>" 2964+"<td>$99</td>" 2965+"<td>$D9</td>" 2966+"<td>$99</td>" 2967+"</tr>" 2968+"<tr>" 2969+"<td style=\"text-align:center;\">D</td>" 2970+"<td>$C4</td>" 2971+"<td>$84</td>" 2972+"<td>$C4</td>" 2973+"<td>$84</td>" 2974+"<td></td>" 2975+"<td style=\"text-align:center;\">Z</td>" 2976+"<td>$DA</td>" 2977+"<td>$9A</td>" 2978+"<td>$DA</td>" 2979+"<td>$9A</td>" 2980+"</tr>" 2981+"<tr>" 2982+"<td style=\"text-align:center;\">E</td>" 2983+"<td>$C5</td>" 2984+"<td>$85</td>" 2985+"<td>$C5</td>" 2986+"<td>$85</td>" 2987+"<td></td>" 2988+"<td style=\"text-align:center;\">->
2988</td>" 2989+"<td>$88</td>" 2990+"<td>$88</td>" 2991+"<td>$88</td>" 2992+"<td>$88</td>" 2993+"</tr>" 2994+"<tr>" 2995+"<td style=\"text-align:center;\">F</td>" 2996+"<td>$C6</td>" 2997+"<td>$86</td>" 2998+"<td>$C6</td>" 2999+"<td>$86</td>" 3000+"<td></td>" 3001+"<td style=\"text-align:center;\"><-</td>" 3002+"<td>$95</td>" 3003+"<td>$95</td>" 3004+"<td>$95</td>" 3005+"<td>$95</td>" 3006+"</tr>" 3007+"<tr>" 3008+"<td style=\"text-align:center;\"></td>" 3009+"<td></td>" 3010+"<td></td>" 3011+"<td></td>" 3012+"<td></td>" 3013+"<td></td>" 3014+"<td style=\"text-align:center;\">ESC</td>" 3015+"<td>$9B</td>" 3016+"<td>$9B</td>" 3017+"<td>$9B</td>" 3018+"<td>$9B</td>" 3019+"</tr>" 3020+"</tbody>" 3021+"</table>" 3022+"<h3 id=\"firmware-keyboard-functions\">Firmware keyboard functions</h3>" 3023+"<p><strong>CTRL-S</strong> triggers the <strong>STOP-LIST</strong> feature, which is pausing any screen text printing at every RETURN code. Screen printing resumes after pressing any key, unless <strong>CTRL-C</strong> is pressed, which breaks screen printing and goes back to the program that is sending output.</p>" 3024+"<p><strong>CTRL-G</strong> does not print any character, instead it produces a tone of 1000Hz in the speaker during 0.1s.</p>" 3025+"<p><strong>CTRL-X</strong> breaks an input line, forgets all what was typed and starts a new input line.</p>" 3026+"<table>" 3027+"<thead>" 3028+"<tr>" 3029+"<th id=\"escape_codes\">Escape codes</th>" 3030+"</tr>" 3031+"</thead>" 3032+"<tbody>" 3033+"</tbody>" 3034+"</table>" 3035+"<p>When pressing the <strong>ESC</strong> key, Apples firmware goes into <em>escape mode</em>. In this mode, 11 keys have separate meanings called <em>escape codes</em>.</p>" 3036+"<p><strong>ESC A</strong>" 3037+": moves cursor one space forward <br>" 3038+"<strong>ESC B</strong>" 3039+": moves cursor one space back <br>" 3040+"<strong>ESC C</strong>" 3041+": moves cursor one line down <br>" 3042+"<strong>ESC D</strong>" 3043+": moves cursor one line up <br>" 3044+"<strong>ESC E</strong>" 3045+": clear until end of line while screen text printing <br>" 3046+"<strong>ESC F</strong>" 3047+": clear until end of screen while screen text printing <br>" 3048+"<strong>ESC @</strong>" 3049+": home and clear - clears entire window and places cursor in upper left corner <br>" 3050+"<strong>ESC K</strong>" 3051+": same as ESC A - move cursor one right <br>" 3052+"<strong>ESC J</strong>" 3053+": same as ESC B - move cursor one left <br>" 3054+"<strong>ESC M</strong>" 3055+": same as ESC C - move cursor one down <br>" 3056+"<strong>ESC I</strong>" 3057+": same as ESC D - move cursor one up </p>" 3058
Line numbers count LF bytes from the start of the resource, as the search results do. Vendor segments are library code the classifier recognised; they are stored but not indexed. Bytes are shown as Latin1 characters, one per byte.