1"use strict";(self.webpackChunkmilkv_website=self.webpackChunkmilkv_website||[]).push([[4203],{60419:(s,d,t)=>{t.r(d),t.d(d,{assets:()=>c,contentTitle:()=>e,default:()=>j,frontMatter:()=>n,metadata:()=>l,toc:()=>x});var i=t(85893),r=t(11151);const n={sidebar_label:"Full reuse of GPIO pins",sidebar_position:41},e="Full reuse of GPIO pins",l={id:"mars/getting-started/gpio_full_multiplexing",title:"Full reuse of GPIO pins",description:"| Signal | Description | Direction | Type | Connect |",source:"@site/docs/mars/getting-started/gpio_full_multiplexing.md",sourceDirName:"mars/getting-started",slug:"/mars/getting-started/gpio_full_multiplexing",permalink:"/docs/mars/getting-started/gpio_full_multiplexing",draft:!1,unlisted:!1,editUrl:"https://github.com/milk-v/milkv.io/edit/main/docs/mars/getting-started/gpio_full_multiplexing.md",tags:[],version:"current",sidebarPosition:41,frontMatter:{sidebar_label:"Full reuse of GPIO pins",sidebar_position:41},sidebar:"mars",previous:{title:"GPIO usage",permalink:"/docs/mars/getting-started/gpio"},next:{title:"\ud83d\udcf9 Support Lists",permalink:"/docs/mars/support-list"}},c={},x=[];function h(s){const d={h1:"h1",table:"table",tbody:"tbody",td:"td",th:"th",thead:"thead",tr:"tr",...(0,r.a)(),...s.components};return(0,i.jsxs)(i.Fragment,{children:[(0,i.jsx)(d.h1,{id:"full-reuse-of-gpio-pins",children:"Full reuse of GPIO pins"}),"\n",(0,i.jsxs)(d.table,{children:[(0,i.jsx)(d.thead,{children:(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.th,{children:"Signal"}),(0,i.jsx)(d.th,{children:"Description"}),(0,i.jsx)(d.th,{children:"Direction"}),(0,i.jsx)(d.th,{children:"Type"}),(0,i.jsx)(d.th,{children:"Connect"})]})}),(0,i.jsxs)(d.tbody,{children:[(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"hifi4_jtag_tck"}),(0,i.jsx)(d.td,{children:"The TAP clock signal for JTAG on HIFI4"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO/Clock"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"hifi4_jtag_tdi"}),(0,i.jsx)(d.td,{children:"The TAP data input signal for JTAG on HIFI4"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"hifi4_jtag_tdo"}),(0,i.jsx)(d.td,{children:"The TAP data output signal for JTAG on HIFI4"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"hifi4_jtag_tms"}),(0,i.jsx)(d.td,{children:"The TAP mode switch signal for JTAG on HIFI4"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"hifi4_jtag_trstn"}),(0,i.jsx)(d.td,{children:"The TAP reset negative signal for JTAG on HIFI4"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"cdns_qspi_qspi_csn1"}),(0,i.jsx)(d.td,{children:"The chip select negative signal for QSPI"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"uart0_rxd"}),(0,i.jsx)(d.td,{children:"The data receiving signal for UART0"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"uart0_txd"}),(0,i.jsx)(d.td,{children:"The data transmission signal for UART0"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"uart1_cts_n"}),(0,i.jsx)(d.td,{children:"The Clear to Send (CTS) negative signal for UART1"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"uart1_rts_n"}),(0,i.jsx)(d.td,{children:"The Require to Send (RTS) negative signal for UART1"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"uart1_rxd"}),(0,i.jsx)(d.td,{children:"The data receiving signal for UART1"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"uart1_txd"}),(0,i.jsx)(d.td,{children:"The data transmission signal for UART1"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"uart2_cts_n"}),(0,i.jsx)(d.td,{children:"The Clear to Send (CTS) negative signal for UART2"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"uart2_rts_n"}),(0,i.jsx)(d.td,{children:"The Require to Send (RTS) negative signal for UART2"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"uart2_rxd"}),(0,i.jsx)(d.td,{children:"The data receiving signal for UART2"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"uart2_txd"}),(0,i.jsx)(d.td,{children:"The data transmission signal for UART2"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"i2c0_i2c_scl"}),(0,i.jsx)(d.td,{children:"The clock signal for I2C0"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"i2c0_i2c_sda"}),(0,i.jsx)(d.td,{children:"The data transmission signal for I2C0"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"i2c1_i2c_scl"}),(0,i.jsx)(d.td,{children:"The clock signal for I2C1"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"i2c1_i2c_sda"}),(0,i.jsx)(d.td,{children:"The data transmission signal for I2C1"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"i2c2_i2c_scl"}),(0,i.jsx)(d.td,{children:"The clock signal for I2C2"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"i2c2_i2c_sda"}),(0,i.jsx)(d.td,{children:"The data transmission signal for I2C2"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"tdm_rx"}),(0,i.jsx)(d.td,{children:"The receiving signal for TDM"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"tdm_sync"}),(0,i.jsx)(d.td,{children:"The synchronization signal for TDM"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"tdm_tx"}),(0,i.jsx)(d.td,{children:"The transmission signal for TDM"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"pdm_4mic_dmic0_din"}),(0,i.jsx)(d.td,{children:"The data input signal for PDM DMIC0"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"pdm_4mic_dmic1_din"}),(0,i.jsx)(d.td,{children:"The data input signal for PDM DMIC1"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"pdm_4mic_dmic_clk"}),(0,i.jsx)(d.td,{children:"The clock signal for PDM DMIC"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"uart3_rxd"}),(0,i.jsx)(d.td,{children:"The data receiving signal for UART3"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"uart3_txd"}),(0,i.jsx)(d.td,{children:"The data transmission signal for UART3"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"uart4_cts_n"}),(0,i.jsx)(d.td,{children:"The Clear to Send (CTS) negative signal for UART4"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"uart4_rts_n"}),(0,i.jsx)(d.td,{children:"The Require to Send (RTS) negative signal for UART4"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"uart4_rxd"}),(0,i.jsx)(d.td,{children:"The data receiving signal for UART4"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"uart4_txd"}),(0,i.jsx)(d.td,{children:"The data transmission signal for UART4"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"uart5_cts_n"}),(0,i.jsx)(d.td,{children:"The Clear to Send (CTS) negative signal for UART5"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"uart5_rts_n"}),(0,i.jsx)(d.td,{children:"The Require to Send (RTS) negative signal for UART5"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"uart5_rxd"}),(0,i.jsx)(d.td,{children:"The data receiving signal for UART5"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"uart5_txd"}),(0,i.jsx)(d.td,{children:"The data transmission signal for UART5"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"i2c3_scl"}),(0,i.jsx)(d.td,{children:"The clock signal for I2C3"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"i2c3_sda"}),(0,i.jsx)(d.td,{children:"The data transmission signal for I2C3"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"i2c4_scl"}),(0,i.jsx)(d.td,{children:"The clock signal for I2C4"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"i2c4_sda"}),(0,i.jsx)(d.td,{children:"The data transmission signal for I2C4"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"i2c5_scl"}),(0,i.jsx)(d.td,{children:"The clock signal for I2C5"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"i2c5_sda"}),(0,i.jsx)(d.td,{children:"The data transmission signal for I2C5"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"i2c6_scl"}),(0,i.jsx)(d.td,{children:"The clock signal for I2C6"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"i2c6_sda"}),(0,i.jsx)(d.td,{children:"The data transmission signal for I2C6"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi0_ssp_sclk"}),(0,i.jsx)(d.td,{children:"The clock signal for SPI0"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi0_ssp_csn"}),(0,i.jsx)(d.td,{children:"The chip select negative signal for SPI0"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi0_ssp_rxd"}),(0,i.jsx)(d.td,{children:"The data receiving signal for SPI0"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi0_ssp_txd"}),(0,i.jsx)(d.td,{children:"The data transmission signal for SPI0"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi1_ssp_sclk"}),(0,i.jsx)(d.td,{children:"The clock signal for SPI1"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi1_ssp_csn"}),(0,i.jsx)(d.td,{children:"The chip select negative signal for SPI1"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi1_ssp_rxd"}),(0,i.jsx)(d.td,{children:"The data receiving signal for SPI1"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi1_ssp_txd"}),(0,i.jsx)(d.td,{children:"The data transmission signal for SPI1"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi2_ssp_sclk"}),(0,i.jsx)(d.td,{children:"The clock signal for SPI2"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi2_ssp_csn"}),(0,i.jsx)(d.td,{children:"The chip select negative signal for SPI2"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi2_ssp_rxd"}),(0,i.jsx)(d.td,{children:"The data receiving signal for SPI2"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi2_ssp_txd"}),(0,i.jsx)(d.td,{children:"The data transmission signal for SPI2"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi3_ssp_sclk"}),(0,i.jsx)(d.td,{children:"The clock signal for SPI3"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPI
1O"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi3_ssp_csn"}),(0,i.jsx)(d.td,{children:"The chip select negative signal for SPI3"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi3_ssp_rxd"}),(0,i.jsx)(d.td,{children:"The data receiving signal for SPI3"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi3_ssp_txd"}),(0,i.jsx)(d.td,{children:"The data transmission signal for SPI3"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi4_ssp_sclk"}),(0,i.jsx)(d.td,{children:"The clock signal for SPI4"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi4_ssp_csn"}),(0,i.jsx)(d.td,{children:"The chip select negative signal for SPI4"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi4_ssp_rxd"}),(0,i.jsx)(d.td,{children:"The data receiving signal for SPI4"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi4_ssp_txd"}),(0,i.jsx)(d.td,{children:"The data transmission signal for SPI4"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi5_ssp_sclk"}),(0,i.jsx)(d.td,{children:"The clock signal for SPI5"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi5_ssp_csn"}),(0,i.jsx)(d.td,{children:"The chip select negative signal for SPI5"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi5_ssp_rxd"}),(0,i.jsx)(d.td,{children:"The data receiving signal for SPI5"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi5_ssp_txd"}),(0,i.jsx)(d.td,{children:"The data transmission signal for SPI5"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi6_ssp_sclk"}),(0,i.jsx)(d.td,{children:"The clock signal for SPI6"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi6_ssp_csn"}),(0,i.jsx)(d.td,{children:"The chip select negative signal for SPI6"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi6_ssp_rxd"}),(0,i.jsx)(d.td,{children:"The data receiving signal for SPI6"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spi6_ssp_txd"}),(0,i.jsx)(d.td,{children:"The data transmission signal for SPI6"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"pwm[0]"}),(0,i.jsx)(d.td,{children:"The PWM 0 signal"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"pwm[1]"}),(0,i.jsx)(d.td,{children:"The PWM 1 signal"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"pwm[2]"}),(0,i.jsx)(d.td,{children:"The PWM 2 signal"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"pwm[3]"}),(0,i.jsx)(d.td,{children:"The PWM 3 signal"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"pwm[4]"}),(0,i.jsx)(d.td,{children:"The PWM 4 signal"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"aon_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"pwm[5]"}),(0,i.jsx)(d.td,{children:"The PWM 5 signal"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"aon_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"pwm[6]"}),(0,i.jsx)(d.td,{children:"The PWM 6 signal"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"aon_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"pwm[7]"}),(0,i.jsx)(d.td,{children:"The PWM 7 signal"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"aon_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sys_crg_clk_jtag_tck"}),(0,i.jsx)(d.td,{children:"The TAP clock signal for JTAG on System CRG clock"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"clkrst_src_bypass_jtag_trstn"}),(0,i.jsx)(d.td,{children:"The TAP reset negative signal for JTAG on clock reset source bypass"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"jtag_certification_tdi"}),(0,i.jsx)(d.td,{children:"The TAP data input signal for JTAG on Certification"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"jtag_certification_tdo"}),(0,i.jsx)(d.td,{children:"The TAP data output signal for JTAG on Certification"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"jtag_certification_tms"}),(0,i.jsx)(d.td,{children:"The TAP mode switch signal for JTAG on Certification"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio0_back_end_power"}),(0,i.jsx)(d.td,{children:"The back end power signal for SDIO0"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio0_card_int_n"}),(0,i.jsx)(d.td,{children:"The card initialization negative signal for SDIO0"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio0_card_power_en"}),(0,i.jsx)(d.td,{children:"The card power supply signal for SDIO0"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio0_card_write_prt"}),(0,i.jsx)(d.td,{children:"The card data write signal for SDIO0"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio0_card_rst_n"}),(0,i.jsx)(d.td,{children:"The card reset negative signal for SDIO0"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio0_ccmd_od_pullup_en_n"}),(0,i.jsx)(d.td,{children:"The pullup enable signal for SDIO0"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio0_card_detect_n"}),(0,i.jsx)(d.td,{children:"The card detect negative signal for SDIO0"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio1_back_end_power"}),(0,i.jsx)(d.td,{children:"The back end power signal for SDIO1"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio1_card_int_n"}),(0,i.jsx)(d.td,{children:"The card initialization negative signal for SDIO1"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio1_card_power_en"}),(0,i.jsx)(d.td,{children:"The card power supply signal for SDIO1"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio1_card_write_prt"}),(0,i.jsx)(d.td,{children:"The card data write signal for SDIO1"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio1_clk"}),(0,i.jsx)(d.td,{children:"The clock signal for SDIO1"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio1_ccmd"}),(0,i.jsx)(d.td,{children:"The Command signal of SDIO1"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio1_cdata[0]"}),(0,i.jsx)(d.td,{children:"The Data 0 signal of SDIO1"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio1_cdata[1]"}),(0,i.jsx)(d.td,{children:"The Data 1 signal of SDIO1"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio1_cdata[2]"}),(0,i.jsx)(d.td,{children:"The Data 2 signal of SDIO1"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio1_cdata[3]"}),(0,i.jsx)(d.td,{children:"The Data 3 signal of SDIO1"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio1_cdata[4]"}),(0,i.jsx)(d.td,{children:"The Data 4 signal of SDIO1"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio1_cdata[5]"}),(0,i.jsx)(d.td,{children:"The Data 5 signal of SDIO1"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio1_cdata[6]"}),(0,i.jsx)(d.td,{children:"The Data 6 signal of SDIO1"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio1_cdata[7]"}),(0,i.jsx)(d.td,{children:"The Data 7 signal of SDIO1"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio1_card_rst_n"}),(0,i.jsx)(d.td,{children:"The card reset signal of SDIO1"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio1_ccmd_od_pullup_en_n"}),(0,i.jsx)(d.td,{children:"The pullup enable signal for SDIO1"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio1_data_strobe"}),(0,i.jsx)(d.td,{children:"The data strobe signal for SDIO1"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sdio1_card_detect_n"}),(0,i.jsx)(d.td,{children:"The card detect signal for SDIO1"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sys_crg_ext_mclk"}),(0,i.jsx)(d.td,{children:"The external main clock signal for System CRG"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sys_crg_mclk_out"}),(0,i.jsx)(d.td,{children:"The main clock output signal for System CRG"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sys_crg_clk_gmac_phy"}),(0,i.jsx)(d.td,{children:"The GMAC PHY signal for System CRG"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sys_crg_i2stx_bclk_mst"}),(0,i.jsx)(d.td,{children:"The bit clock master signal for I2S Transmission"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sys_crg_i2stx_lrck_mst"}),(0,i.jsx)(d.td,{children:"The left-right clock (frame clock) master signal for I2S Transmission"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sys_crg_i2srx_bclk_mst"}),(0,i.jsx)(d.td,{children:"The bit clock master signal for I2S Receiving"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sys_crg_i2srx_lrck_mst"}),(0,i.jsx)(d.td,{children:"The left-right clock (frame clock) master signal for I2S Receiving"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sys_crg_i2stx_bclk_slv"}),(0,i.jsx)(d.td,{children:"The bit clock slave signal for I2S Transmission"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sys_crg_i2stx_lrck_slv"}),(0,i.jsx)(d.td,{children:"The left-right clock (frame clock) slave signal for I2S Transmission"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sys_crg_i2srx_bclk_slv"}),(0,i.jsx)(d.td,{children:"The bit clock slave signal for I2S Receiving"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sys_crg_i2srx_lrck_slv"}),(0,i.jsx)(d.td,{children:"The left-right clock (frame clock) slave signal for I2S Receiving"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sys_crg_tdm_clk_slv"}),(0,i.jsx)(d.td,{children:"The TDM slave clock signal for System CRG"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.j
1sx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sys_crg_tdm_clk_mst"}),(0,i.jsx)(d.td,{children:"The TDM master clock signal for System CRG"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"aon_crg_clk_32k_out"}),(0,i.jsx)(d.td,{children:"The clock 32K output signal for AON CRG"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"aon_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"i2stx_4ch_sdo0"}),(0,i.jsx)(d.td,{children:"The Sound Output 0 for I2S"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"i2stx_4ch_sdo1"}),(0,i.jsx)(d.td,{children:"The Sound Output 1 for I2S"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"i2stx_4ch_sdo2"}),(0,i.jsx)(d.td,{children:"The Sound Output 2 for I2S"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"i2stx_4ch_sdo3"}),(0,i.jsx)(d.td,{children:"The Sound Output 3 for I2S"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"audio_i2srx_ext_sdin0"}),(0,i.jsx)(d.td,{children:"The Sound Input 0 for I2S"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"audio_i2srx_ext_sdin1"}),(0,i.jsx)(d.td,{children:"The Sound Input 1 for I2S"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"audio_i2srx_ext_sdin2"}),(0,i.jsx)(d.td,{children:"The Sound Input 2 for I2S"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sys_crg_clk_gclk0"}),(0,i.jsx)(d.td,{children:"The Global Clock 0 signal for System CRG"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"aon_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sys_crg_clk_gclk1"}),(0,i.jsx)(d.td,{children:"The Global Clock 1 signal for System CRG"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"aon_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"sys_crg_clk_gclk2"}),(0,i.jsx)(d.td,{children:"The Global Clock 2 signal for System CRG"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"aon_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spdif_spdifi"}),(0,i.jsx)(d.td,{children:"The input signal for SPDIF"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"spdif_spdifo"}),(0,i.jsx)(d.td,{children:"The output signal for SPDIF"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"vout_hdmi_tx_cec_sda"}),(0,i.jsx)(d.td,{children:"The serial data CEC signal for HDMI Transmission"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"vout_hdmi_tx_ddc_scl"}),(0,i.jsx)(d.td,{children:"The serial clock DDC signal for HDMI Transmission"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"vout_hdmi_tx_ddc_sda"}
1),(0,i.jsx)(d.td,{children:"The serial data DDC signal for HDMI Transmission"}),(0,i.jsx)(d.td,{children:"Input/Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"vout_hdmi_tx_hdmitx_hpd"}),(0,i.jsx)(d.td,{children:"The Hot Plug Detect (HPD) signal for HDMI Transmission"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"usb_drive_vbus_io"}),(0,i.jsx)(d.td,{children:"The VBUS (power supply + cable) input/output signal for USB"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"usb_overcurrent_n_io"}),(0,i.jsx)(d.td,{children:"The over-current input/output signal for USB"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"u7mc_sft7110_tref"}),(0,i.jsx)(d.td,{children:"The Timer Reference signal for U74 MC"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"u7mc_sft7110_tdata[0]"}),(0,i.jsx)(d.td,{children:"The Timer Data 0 signal for U74 MC"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"u7mc_sft7110_tdata[1]"}),(0,i.jsx)(d.td,{children:"The Timer Data 1 signal for U74 MC"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"u7mc_sft7110_tdata[2]"}),(0,i.jsx)(d.td,{children:"The Timer Data 2 signal for U74 MC"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"u7mc_sft7110_tdata[3]"}),(0,i.jsx)(d.td,{children:"The Timer Data 3 signal for U74 MC"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"WAVE511_i_uart_rxsin"}),(0,i.jsx)(d.td,{children:"The UART receiving input signal for WAVE511"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"WAVE511_o_uart_txsout"}),(0,i.jsx)(d.td,{children:"The UART transmission input signal for WAVE511"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"GPIO_wakeup[3]"}),(0,i.jsx)(d.td,{children:"The GPIO Wakeup 3 signal"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"aon_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"GPIO_wakeup[2]"}),(0,i.jsx)(d.td,{children:"The GPIO Wakeup 2 signal"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"aon_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"GPIO_wakeup[1]"}),(0,i.jsx)(d.td,{children:"The GPIO Wakeup 1 signal"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"aon_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"GPIO_wakeup[0]"}),(0,i.jsx)(d.td,{children:"The GPIO Wakeup 0 signal"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"aon_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"can_ctrl0_can_txd"}),(0,i.jsx)(d.td,{children:"The data transmission signal for CAN Controller 0"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"can_ctrl0_can_rxd"}),(0,i.jsx)(d.td,{children:"The data receiving signal for CAN Controller 0"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"can_ctrl1_can_stby"}),(0,i.jsx)(d.td,{children:"The standby signal for CAN Controller 1"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"can_ctrl1_can_txd"}),(0,i.jsx)(d.td,{children:"The data transmission signal for CAN Controller 1"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"can_ctrl1_can_rxd"}),(0,i.jsx)(d.td,{children:"The data receiving signal for CAN Controller 1"}),(0,i.jsx)(d.td,{children:"Input"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"can_ctrl1_can_stby"}),(0,i.jsx)(d.td,{children:"The standby signal for CAN Controller 1"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"can_ctrl0_tst_sample_point"}),(0,i.jsx)(d.td,{children:"The test sample point for CAN Controller 0"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"can_ctrl0_tst_next_bit"}),(0,i.jsx)(d.td,{children:"The test next point for CAN Controller 0"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"can_ctrl1_tst_sample_point"}),(0,i.jsx)(d.td,{children:"The test sample point for CAN Controller 1"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"can_ctrl1_tst_next_bit"}),(0,i.jsx)(d.td,{children:"The test next point for CAN Controller 1"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]}),(0,i.jsxs)(d.tr,{children:[(0,i.jsx)(d.td,{children:"dskit_wdt_rstout"}),(0,i.jsx)(d.td,{children:"The reset output signal for WDT"}),(0,i.jsx)(d.td,{children:"Output"}),(0,i.jsx)(d.td,{children:"GPIO"}),(0,i.jsx)(d.td,{children:"sys_iomux"})]})]})]})]})}function j(s={}){const{wrapper:d}={...(0,r.a)(),...s.components};return d?(0,i.jsx)(d,{...s,children:(0,i.jsx)(h,{...s})}):h(s)}},11151:(s,d,t)=>{t.d(d,{Z:()=>l,a:()=>e});var i=t(67294);const r={},n=i.createContext(r);function e(s){const d=i.useContext(n);return i.useMemo((function(){return"function"==typeof s?s(d):{...d,...s}}),[d,s])}function l(s){let d;return d=s.disableParentContext?"function"==typeof s.components?s.components(r):s.components||r:e(s.components),i.createElement(n.Provider,{value:d},s.children)}}}]);
Line numbers count LF bytes from the start of the resource, as the search results do. Vendor segments are library code the classifier recognised; they are stored but not indexed. Bytes are shown as Latin1 characters, one per byte.