1import{j as a,L as c}from"./main-5zZu2UcF.js";import{c as h,U as x,i as _,M as g,H as p,a as o,Z as w,j as y}from"./useCircuitSimulator-Ocs-zDtT.js";import{C as u}from"./CircuitEmbed-BaKGR7p9.js";import"./CircuitCanvas-9Oc83aTy.js";import"./index-C6v6OnJi.js";const f=h("RV32I_Board",{nodes:{cpu:y(),rom:w(),mem_bus:g,dmem:_,uart:x,zero32:o({value:0,width:32}),zero1:o({value:0,width:1}),pc_display:p({width:32})},connect:({nodes:{cpu:t,rom:i,mem_bus:e,dmem:r,uart:d,zero32:n,zero1:s,pc_display:l}})=>[t.instr_addr.to(i.addrA),i.dataA.to(t.instruction),t.data_addr.to(e.addr),t.data_write.to(e.write_data),t.data_mem_read.to(e.mem_read),t.data_mem_write.to(e.mem_write),t.data_funct3.to(e.funct3),e.local_addr.to(r.addr,d.addr,i.addrB),e.write_data_out.to(r.write_data,d.write_data),e.p0_read.to(r.mem_read),e.p0_write.to(r.mem_write),e.funct3_out.to(r.funct3),r.read_data.to(e.read_data_0),e.p1_read.to(d.mem_read),e.p1_write.to(d.mem_write),d.read_data.to(e.read_data_1),i.dataB.to(e.read_data_4),n.out.to(t.net_rx_data,e.read_data_2,e.read_data_3),s.out.to(t.net_rx_valid,t.net_rx_frame),e.read_data.to(t.data_read),t.pc_out.to(l.in)]});function v(){return a.jsxs("section",{className:"py-12",children:[a.jsx("h2",{className:"text-3xl font-bold text-gray-900 dark:text-white mb-4",children:"The Payoff: Running C"}),a.jsxs("div",{className:"prose-invert space-y-6",children:[a.jsx("p",{className:"text-gray-600 dark:text-gray-300 leading-relaxed",children:"Thatâs the whole CPU. A program counter, a decoder, an ALU, memory, a register file, pipeline registers between each stage, and forwarding/hazard logic to keep it all correct. Around 600 lines of circuit description: registers, muxes, and functional blocks wired together structurally, like a real hardware design."}),a.jsxs("p",{className:"text-gray-600 dark:text-gray-300 leading-relaxed",children:["Below is the complete board (CPU chip, instruction ROM, data RAM, memory bus, and UART), just like a real PCB. Click the"," ",a.jsx("strong",{className:"text-gray-900 dark:text-white",children:"Code"})," button on the ROM node to write C, Rust, or Assembly. The compiler produces a RISC-V binary that loads directly into the ROM. Then step the clock and watch your code execute through the 5-stage pipeline."]}),a.jsx("p",{className:"text-gray-600 dark:text-gray-300 leading-relaxed",children:"Double-click the CPU to drill into its internals, and youâll see every pipeline register, every forwarding mux, every hazard signal. Toggle switches, inspect values, rewind time. Itâs the same circuit, all the way down."})]}),a.jsx("div",{className:"mt-8",children:a.jsx(u,{circuit:f,showControls:!0,title:"RV32I CPU Board",description:"Click 'Code' on the ROM to load a program, then step the clock."})}),a.jsx("div",{className:"mt-6 text-center",children:a.jsx(c,{to:"/cpu/rv32i",className:"text-sm text-blue-400 hover:text-blue-300 underline underline-offset-2",children:"Open full-screen debugger â"})})]})}export{v as RunningCodeSection};
Line numbers count LF bytes from the start of the resource, as the search results do. Vendor segments are library code the classifier recognised; they are stored but not indexed. Bytes are shown as Latin1 characters, one per byte.